參數資料
型號: M2V56S40ATP-8
廠商: Mitsubishi Electric Corporation
英文描述: 256M Synchronous DRAM
中文描述: 256M同步DRAM
文件頁數: 3/49頁
文件大?。?/td> 239K
代理商: M2V56S40ATP-8
Feb.2000
MITSUBISHI LSIs
MITSUBISHI ELECTRIC
SDRAM (Rev.1.1)
Single Data Rate
M2V56S20/ 30/ 40/ TP -6, -7, -8
256M Synchronous DRAM
3
Speed Grade 6: 133MHz@CL3, 100MHz@CL2
7: 100MHz@CL2
8: 100MHz@CL3
Type Designation Code
M 2 V 56 S 4 0
This rule is applied to only Synchronous DRAM family.
Mitsubishi Main Designation
Package Type TP: TSOP(II)
Process Generation
Function Reserved for Future Use
Organization 2n2: x4, 3: x8, 4: x16
SDRAM Data Rate Type S:Single Data Rate
Density 56: 256M bits
Interface V:LVTTL
Memory Style (DRAM)
TP - 8
BLOCK DIAGRAM
/CS /RAS /CAS /WE DQMU/L
Memory
Array
Bank #0
DQ0-3 (x4), 0-7 (x8), 0 - 15 (x16)
I/O Buffer
Memory
Array
Bank #1
Memory
Array
Bank #2
Memory
Array
Bank #3
Mode Register
Control Circuitry
Address Buffer
A0-12
BA0,1
Clock Buffer
CLK
CKE
Control Signal Buffer
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相關代理商/技術參數
參數描述
M2V56S40TP 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Synchronous DRAM
M2V56S40TP-6 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Synchronous DRAM
M2V56S40TP-7 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Synchronous DRAM
M2V56S40TP-8 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Synchronous DRAM
M2V64S20BTP 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M bit Synchronous DRAM