參數資料
型號: M2V28S30ATP-7
廠商: Mitsubishi Electric Corporation
英文描述: 128M Synchronous DRAM
中文描述: 128M的同步DRAM
文件頁數: 7/52頁
文件大?。?/td> 639K
代理商: M2V28S30ATP-7
M2V28S20TP-6,-7,-8
M2V28S30TP-6,-7,-7L,-8,-8L
M2V28S40TP-7,-7L,-8,-8L
Jun. '99
MITSUBISHI LSIs
SDRAM (Rev. 1.0E)
128M Synchronous DRAM
(4-BANK x 8,388,608-WORD x 4-BIT)
(4-BANK x 4,194,304-WORD x 8-BIT)
(4-BANK x 2,097,152-WORD x 16-BIT)
7
COMMAND TRUTH TABLE
H=High Level, L=Low Level, V=Valid, X=Don't Care, n=CLK cycle number
NOTE:
1. A7-A9 =0, A0-A6 =Mode Address
COMMAND
MNEMONIC
CKE
n-1
CKE
n
/CS
/RAS /CAS
/WE BA0,1 A11
A10
A0-9
Deselect
DESEL
H
X
H
X
X
X
X
X
X
X
No Operation
NOP
H
X
L
H
H
H
X
X
X
X
Row Address Entry &
Bank Activate
ACT
H
X
L
L
H
H
V
V
V
V
Single Bank Precharge
PRE
H
X
L
L
H
L
V
X
L
X
Precharge All Banks
PREA
H
X
L
L
H
L
X
H
X
Column Address Entry
& Write
Column Address Entry &
Write with Auto-Precharge
Column Address Entry
& Read
Column Address Entry &
Read with Auto-Precharge
WRITE
H
X
L
H
L
L
V
V
L
V
WRITEA
H
X
L
H
L
L
V
V
H
V
READ
H
X
L
H
L
H
V
V
L
V
READA
H
X
L
H
L
H
V
V
H
V
Auto-Refresh
REFA
H
H
L
L
L
H
X
X
X
X
Self-Refresh Entry
REFS
H
L
L
L
L
H
X
X
X
X
Self-Refresh Exit
REFSX
L
H
H
X
X
X
X
X
X
X
L
H
L
H
H
H
X
X
X
X
Mode Register Set
MRS
H
X
L
L
L
L
L
L
L
V*1
X
相關PDF資料
PDF描述
M2V28S30ATP-7L 128M Synchronous DRAM
M2V28S30ATP-8 128M Synchronous DRAM
M2V28S30ATP-8L 128M Synchronous DRAM
M2V28S30TP 128M Synchronous DRAM
M2V28S40ATP 128M Synchronous DRAM
相關代理商/技術參數
參數描述
M2V28S30ATP-7L 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:128M Synchronous DRAM
M2V28S30ATP-8 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:128M Synchronous DRAM
M2V28S30ATP-8L 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:128M Synchronous DRAM
M2V28S30AVP-7 制造商:Mitsubishi Electric 功能描述:
M2V28S30TP 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:128M Synchronous DRAM