參數(shù)資料
型號: M2V28S20TP-7
廠商: Mitsubishi Electric Corporation
英文描述: 128 x 64 pixel format, LED Backlight available
中文描述: 128M的同步DRAM
文件頁數(shù): 26/52頁
文件大小: 639K
代理商: M2V28S20TP-7
M2V28S20TP-6,-7,-8
M2V28S30TP-6,-7,-7L,-8,-8L
M2V28S40TP-7,-7L,-8,-8L
Jun. '99
MITSUBISHI LSIs
SDRAM (Rev. 1.0E)
128M Synchronous DRAM
(4-BANK x 8,388,608-WORD x 4-BIT)
(4-BANK x 4,194,304-WORD x 8-BIT)
(4-BANK x 2,097,152-WORD x 16-BIT)
26
SELF REFRESH
Self-refresh mode is entered by issuing a REFS command (/CS= /RAS= /CAS= L, /WE= H,
CKE= L). Once the self-refresh is initiated, it is maintained as long as CKE is kept low. During the
self-refresh mode, CKE is asynchronous and the only enabled input ,all other inputs including CLK
are disabled and ignored, so that power consumption due to synchronous inputs is saved. To exit the
self-refresh, supplying stable CLK inputs, asserting DESEL or NOP command and then asserting
CKE (REFSX) for longer than tSRX. After tRC from REFSX all banks are in the idle state and a new
command can be issued, but DESEL or NOP commands must be asserted till then.
Self-Refresh
CLK
/CS
/RAS
/CAS
/WE
CKE
A0-11
BA0,1
Self Refresh Entry
Self Refresh Exit
X
00
Stable CLK
NOP
new command
tSRX
minimum tRC
+1 CLOCK
for recovery
相關PDF資料
PDF描述
M2V28S30TP-7 128 x 64 pixel format, LED Backlight available
M2V28S40TP-7 128 x 64 pixel format, LED Backlight available
M2V28S30ATP 128M Synchronous DRAM
M2V28S30ATP-6 128M Synchronous DRAM
M2V28S30ATP-6L 128M Synchronous DRAM
相關代理商/技術參數(shù)
參數(shù)描述
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M2V28S30ATP-6L 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:128M Synchronous DRAM
M2V28S30ATP-7 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:128M Synchronous DRAM