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參數(shù)資料
| 型號： | M12S16161A-10T |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 512K x 16Bit x 2Banks Synchronous DRAM |
| 中文描述： | 為512k × 16Bit的X 2Banks同步DRAM |
| 文件頁數(shù)： | 3/28頁 |
| 文件大?。?/td> | 871K |
| 代理商： | M12S16161A-10T |
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ESMT
DQ0 ~ 15
Data Input / Output
VDD/VSS
Power Supply/Ground
M12S16161A
Elite Semiconductor Memory Technology Inc.
Publication Date
:
Jun. 2005
Revision
:
1.0
3/28
Data inputs/outputs are multiplexed on the same pins.
Power and ground for the input buffers and the core logic.
Isolated power supply and ground for the output buffers to provide improved
noise immunity.
VDDQ/VSSQ
Data Output Power/Ground
N.C/RFU
No Connection/
Reserved for Future Use
This pin is recommended to be left No Connection on the device.
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
V
IN
,V
OUT
V
DD
,V
DDQ
T
STG
P
D
I
OS
Value
-1.0 ~ 4.6
-1.0 ~ 4.6
-55 ~ + 150
0.7
50
Unit
V
V
C
°
W
MA
Voltage on any pin relative to V
SS
Voltage on V
DD
supply relative to V
SS
Storage temperature
Power dissipation
Short circuit current
Note:
Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
DC OPERATING CONDITIONS
Recommended operating conditions (Voltage referenced to V
SS
= 0V, T
A
= 0
C
°
~ 70
C
°
)
Parameter
Symbol
V
DD
Min
2.3
2.3
1.65
Typ
2.5
2.5
-
-
0
-
-
-
-
Max
2.7
2.7
2.7
V
DDQ
+0.3
0.3
-
0.2
10
10
Unit
V
V
V
V
V
V
V
uA
uA
Note
1
1
2
Supply voltage
Input logic high voltage
Input logic low voltage
Output logic high voltage
Output logic low voltage
Input leakage current
Output leakage current
Note :
1. ESMT can support VDDQ 2.5V (in general case) and 1.8V (in specific case) for VDD 2.5V products. Please contact
to sales. Dept. when condisering the use fo VDDQ 1.8V (min 1.65V).
2.V
IH
(max) = 4.6V AC for pulse width
≤
3ns acceptable.
3.V
IL
(min) = -1.0V AC for pulse width
≤
3ns acceptable.
4.Any input 0V
≤
V
IN
≤
V
DDQ
, all other pins are not under test = 0V.
5.Dout is disabled, 0V
≤
V
OUT
≤
V
DDQ
.
V
DDQ
V
IH
V
IL
V
OH
V
OL
I
IL
I
OL
0.8 x V
DDQ
-0.3
V
DDQ
– 0.2
-
-10
-10
I
OH
=-0.1mA
I
OL
= 0.1mA
3
4
CAPACITANCE
(V
DD
= 2.5V, T
A
= 25
C
°
, f = 1MHz)
Pin
Symbol
C
CLK
Min
-
Max
4.0
Unit
pF
CLOCK
RAS , CAS ,
WE
, CS , CKE, LDQM,
UDQM
ADDRESS
DQ0 ~DQ15
C
IN
-
4.0
pF
C
ADD
C
OUT
-
-
4.0
6.0
pF
pF
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M12S16161A-10TG | 512K x 16Bit x 2Banks Synchronous DRAM |
| M12S16161A-15T | 512K x 16Bit x 2Banks Synchronous DRAM |
| M12S16161A-15TG | 512K x 16Bit x 2Banks Synchronous DRAM |
| M1300 | Mini size of Discrete semiconductor elements |
| M14 | Mini size of Discrete semiconductor elements |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M12S16161A-10TG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:512K x 16Bit x 2Banks Synchronous DRAM |
| M12S16161A-15T | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:512K x 16Bit x 2Banks Synchronous DRAM |
| M12S16161A-15TG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:512K x 16Bit x 2Banks Synchronous DRAM |
| M12S16161A-6BG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:512K x 16Bit x 2Banks Synchronous DRAM |
| M12S16161A-6BIG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:512K x 16Bit x 2Banks Synchronous DRAM |
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