參數(shù)資料
型號(hào)： M12L16161A-7T
廠商： Electronic Theatre Controls, Inc.
英文描述： 512K x 16Bit x 2Banks Synchronous DRAM
中文描述： 為512k × 16Bit的X 2Banks同步DRAM
文件頁數(shù)： 3/27頁
文件大?。?/td> 566K
代理商： M12L16161A-7T
M12L16161A
Elite Semiconductor Memory Technology Inc.
P.
3
Publication Date : J an. 2000
Revision : 1.3u
V
DDQ
/V
SSQ
Data Output Power/Ground
Isolated power supply and ground for the output buffers to provide improved
noise immunity.
N.C/RFU
No Connection/
Reserved for Future Use
This pin is recommended to be left No Connection on the device.
ABSOLUTE MAXIMUM RATINGS
Parameter
Voltage on any pin relative to V
SS
Voltage on V
DD
supply relative to V
SS
Storage temperature
Power dissipation
Short circuit current
Symbol
V
IN,
V
OUT
V
DD
,V
DDQ
T
STG
P
D
I
OS
Value
-1.0 ~ 4.6
-1.0 ~ 4.6
-55 ~ + 150
1
50
Unit
V
V
°
W
MA
C
Note:
Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
DC OPERATING CONDITIONS
Recommended operating conditions (Voltage referenced to VSS = 0V, TA=0 to 70
C
°
)
Parameter
Symbol
V
DD
,V
DDQ
V
IH
V
IL
V
OH
V
OL
I
IL
I
OL
Min
3.0
2.0
-0.3
2.4
-
-5
-5
Typ
3.3
3.0
0
-
-
-
-
Max
3.6
V
DD
+0.3
0.8
-
0.4
5
5
Unit
V
V
V
V
V
uA
uA
Note
Supply voltage
Input logic high voltage
Input logic low voltage
Output logic high voltage
Output logic low voltage
Input leakage current
Output leakage current
Note :
1.V
IH
(max) = 4.6V AC for pulse width
≤
10ns acceptable.
2.V
IL
(min) = -1.5V AC for pulse width
≤
10ns acceptable.
3.Any input 0V
≤
V
IN
≤
V
DD
+ 0.3V, all other pins are not under test = 0V.
4.Dout is disabled, 0V
≤
V
OUT
≤
V
DD
.
1
2
I
OH
=-2mA
I
OL
= 2mA
3
4
CAPACITANCE
(V
DD
= 3.3V, T
A
= 25
C
Pin
CLOCK
RAS, CAS, WE , CS , CKE, LDQM,
UDQM
ADDRESS
DQ0 ~DQ15
°
, f = 1MHz)
Symbol
C
CLK
Min
2.5
Max
4.0
Unit
pF
C
IN
2.5
5.0
pF
C
ADD
C
OUT
2.5
4.0
5.0
6.5
pF
pF
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