參數(shù)資料
型號(hào): M12L16161A-6T
廠商: Electronic Theatre Controls, Inc.
英文描述: 512K x 16Bit x 2Banks Synchronous DRAM
中文描述: 為512k × 16Bit的X 2Banks同步DRAM
文件頁(yè)數(shù): 6/27頁(yè)
文件大?。?/td> 566K
代理商: M12L16161A-6T
M12L16161A
Elite Semiconductor Memory Technology Inc.
P.
6
Publication Date : J an. 2000
Revision : 1.3u
AC CHARACTERISTICS
(AC operating conditions unless otherwise noted)
-4.3
-5
-5.5
-6
-7
-8
Parameter
SymbolMin Max Min Max Min Max Min Max Min Max Min MaxUnit Note
4.3
5
5.5
6
t
CC
6
-
4
-
4.5 -
5
-
t
SAC
-
5
-
5
-
6
-
CAS Latency =3
CAS Latency =2
CAS Latency =3
CAS Latency =2
7
8
CLK cycle time
1000 7
1000 7.5
1000 8
1000 8.6
5.5 -
6
1000 10
6
6
1000 ns
1
-
-
6
7
CLK to valid
output delay
-
ns
1
Output data hold time
t
OH
2
2
2.5
2.5
2.5
2.5
ns
2
CLK high pulse width
t
CH
1.7
2
2
2
2.5
3
ns
3
CLK low pulse width
t
CL
1.7
2
2
2
2.5
3
ns
3
Input setup time
t
SS
1.7
2
2
2
2
2.5
ns
3
Input hold time
t
SH
1
1
1
1
1
1
ns
3
CLK to output in Low-Z
t
SLZ
1
1
1
1
1
1
ns
2
CAS Latency =3
-
4
-
4.5
-
5
-
5.5 -
6
-
6
CLK to output
in Hi-Z
CAS latency =2
t
SHZ
-
5
-
5
-
6
-
6
-
6
-
7
ns
*All AC parameters are measured from half to half.
Note:
1.Parameters depend on programmed CAS latency.
2.If clock rising time is longer than 1ns,(tr/2-0.5)ns should be added to the parameter.
3.Assumed input rise and fall time (tr & tf)=1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered, i.e., [(tr+ tf)/2-1]ns should be added to
the parameter.
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