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參數(shù)資料
| 型號： | M1010-01 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | VCSO BASED CLOCK JITTER ATTENUATOR |
| 中文描述： | 才能開發(fā)出復(fù)雜基于時鐘抖動衰減器 |
| 文件頁數(shù)： | 2/8頁 |
| 文件大?。?/td> | 360K |
| 代理商： | M1010-01 |
Communications Modules
●
www.icst.com
●
tel (508) 852-5400
Integrated
Circuit
Systems, Inc.
M1010-01
VCSO B
ASED
C
LOCK
J
ITTER
A
TTENUATOR
P r e l i m i n a r y I n f o r m a t i o n
D
ETAILED
B
LOCK
D
IAGRAM
Figure 3: Detailed Block Diagram
P
IN
D
ESCRIPTIONS
Number
1,2,3,10,14,26
4
9
5
8
6
7
11,18,19,33
12,13,17,25,32
15
16
20
Name
GND
OP_IN
nOP_IN
nOP_OUT
OP_OUT
nVC
VC
VCC
NC
FOUT
nFOUT
nDIF_REF1
I/O
Ground
Configuration
Description
Power supply ground connections.
Input
External loop filter connections.
See Figure 4, External Loop Filter, on pg. 4.
Output
Input
Power
Power supply connection, connect to +
3.3
V
No internal connection.
Output
No internal terminator
Clock output pairs. Differential LVPECL.
Input
Internal pull-UP resistor
1
Internal pull-down resistor
1
Internal pull-down resistor
1
Referenc
e clock input selection.
LVCMOS/LVTTL:
Logic
1
selects
DIF_REF1, nDIF_REF1.
Logic
0
selects
DIF_REF0, nDIF_REF0
.
Internal pull-UP resistor
1
Reference clock input pair.
Differential LVPECL or LVDS.
Internal pull-down resistor
1
I
nput clock frequency selection. LVCMOS/LVTTL.
See
Table 3,
Mfin (Frequency Input) Divider Look-Up Table
(LUT)
on
pg. 3.
Note 1: For typical values of internal pull-down and pull-up resistors, see “Inputs with Pull-down” and “Inputs with Pull-up”
in Table 8, DC Characteristics, on pg. 6.
Reference clock input pair.
Differential LVPECL or LVDS.
21
DIF_REF1
22
REF_SEL
Input
23
nDIF_REF0
Input
24
DIF_REF0
27
28
FIN_SEL1
FIN_SEL0
Input
Internal pull-down resistor
1
29
30
31
34,35,36
SEL0
SEL1
SEL2
DNC
Input
Internal pull-UP resistor
1
M and R divider value selection. LVCMOS/ LVTTL.
See
Table 4,
SEL2:0 Look-up Table (LUT)
on
pg. 3.
Do Not Connect.
Table 2: Pin Descriptions
Phase
Locked
Loop
(PLL)
M1010
SAW Delay Line
Phase
Shifter
VCSO
C
POST
C
POST
VC
nVC
R
POST
nOP_OUT
OP_OUT
R
POST
R
LOOP
R
LOOP
C
LOOP
C
LOOP
R
IN
R
IN
OP_IN
nOP_IN
Phase
Detector
Loop Filter
Amplifier
External
Loop Filter
Components
FOUT
nFOUT
SEL2:0
FIN_SEL1:0
R Div
MUX
0
REF_SEL
DIF_REF1
nDIF_REF1
DIF_REF0
nDIF_REF0
1
2
Divider LUT
3
Mfin Divider
LUT
Mfin Divider
M Div
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