參數(shù)資料
型號: LXT384BE
元件分類: 通信、網(wǎng)絡(luò)模塊及開發(fā)工具
英文描述: Telecomm/Datacomm
中文描述: 電信/數(shù)據(jù)通信
文件頁數(shù): 14/80頁
文件大?。?/td> 1112K
代理商: LXT384BE
LXT384
Octal T1/E1/J1 Transceiver
14
Datasheet
11
E2
MODE
DI
Mode Select Input.
This pin is used to select the operating mode of the
LXT384. In Hardware Mode, the parallel processor interface is disabled
and hardwired pins are used to control configuration and report status.
In Parallel Host Mode, the parallel port interface pins are used to control
configuration and report status.
In Serial Host mode, the serial interface pins: SDI, SDO, SCLK and
CS
are used.
For Serial Host Mode, the pin should connected to a resistive divider
consisting of two 10 k
resistors across V
CC
and Ground.
12
F4
A4
DI
Address Select Input.
In non-multiplexed host mode, this pin is
Address 4 input pin.
In hardware mode, this pin must be connected to
Ground.
Table 1. LXT384 Pin Description (Sheet 4 of 12)
Pin #
QFP
Ball #
PBGA
Symbol
I/O
1
Description
1. DI: Digital Input; DO: Digital Output; DI/O: Digital Bidirectional Port; AI: Analog Input; AO: Analog Output
S: Power Supply; N.C.: Not Connected.
MODE
Operating Mode
Low
Hardware Mode
High
Parallel Host Mode
Vcc/2
Serial Host Mode
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