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參數(shù)資料
| 型號(hào)： | LX1692BIPW-TR |
| 廠商： | MICROSEMI CORP-ANALOG MIXED SIGNAL GROUP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 0.1 A SWITCHING CONTROLLER, PDSO20 |
| 封裝： | ROHS COMPLIANT, PLASTIC, TSSOP-20 |
| 文件頁數(shù)： | 9/13頁 |
| 文件大?。?/td> | 300K |
| 代理商： | LX1692BIPW-TR |
LX1692B
PRODUCTION DATA SHEET
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 5
Copyright
2005
Rev. 1.1, 12/20/2006
WWW
.Microse
m
i
.CO
M
Full Bridge Resonant CCFL Controller
TM
ELECTRICAL CHA RACTERISTICS
Unless otherwise specified, the following specifications apply over the operating ambient temperature -20
°C
≤ T
A ≤ 70°C except where
otherwise noted and the following test conditions:.
LX1692B
Parameter
Symbol
Test Conditions
Min
Typ
Max
Units
POWER
Power Supply Input Voltage
VDDP
4.5
5.5
V
Power Supply Output Voltage
VDD_A
VDDP = 4.5V to 5.5V, I Load = 5 mADC
3.8
4.0
4.2
V
VDDP Operating Current
ISB
fLAMP = 62.5kHz, T
A=25°C
3.8
5.3
6.8
mA
VDDP Operating Current
IBB
CAOUT = CBOUT= CCOUT = CDOUT=2000pF,
fLAMP = 62.5kHz
10
15
mA
ENABLE INPUT
ENABLE Logic Threshold
VTH_EN
1.6
1.85
2.0
V
ENABLE threshold Hysteresis
VH_EN
500
mV
ENABLE High
VEN_HIGH
2.4
VDDP
V
ENABLE Low
VEN_LOW
0
0.8
V
Sleep Mode Current
IDD_SLEEP
VENABLE = 0V
20
50
A
Input Resistance
RENR
100
K
UNDER VOLTAGE LOCKOUT
UVLO Threshold VDDP
VTH_UVLO_P
Rising edge
3.8
4.2
V
UVLO Hysteresis
VH_UVLO
200
mV
BRIGHTNESS CONTROL
BRITE_A Voltage Range
VR_BR_A
0
VDDP
V
Full Brightness BRITE_A Input
VBR_FULL _A
VR_BR_D = VDDA, TA=25°C
1.9
2
2.1
V
Full Darkness BRITE_A Input
VDARK_FULL_A VR_BR_D = VDDA
0
V
Full Darkness BRITE_A input Offset VDARKFULL_OS VR_BR_D = VDDA, BRITE_A = 0V
0.35
0.45
0.55
V
BRITE_D Voltage Range
VR_BR_D
VR_BR_A = VDDA
0.4
VDDP
V
Full Brightness BRITE_D Input
VBR_FULL _D
VR_BR_A = VDDA, TA=25°C
2.37
2.5
2.63
V
Full Darkness BRITE_D Input
VDARK_FULL_D VR_BR_A = VDDA
0.43
0.55
0.67
V
BURST RAMP GENERATOR
Ramp Valley Voltage
VRVV
0.43
0.55
0.67
V
Ramp Peak Voltage
VRPV
2.37
2.5
2.63
V
Ramp Frequency
FRAMP
C_BST = 10nF, I_R = 40K, Ta=25
°C
230
250
270
Hz
Burst Duty Cycle Range
0
100
%
BRITE_D to DIMPWM Jitter
JBDD
C_BST = 10nF, BRITE_D = 2.4V
1
3
s
Burst PWM min Duty Resolution
DRBST
1
%
LAMP FREQUENCY GENERATOR
Lamp Frequency Range
FLAMP
30
150
kHz
Lamp Ramp Frequency
FLAMP
Lamp Ignited, Run Mode, TA = 25°C, I_R = 40K,
C_R = 100pF
59.3
62.5
65.7
kHz
Lamp Ramp Frequency Regulation
FLAMP_REG
4.5 > VDDP < 5.5V, TA = 25°C
VDDP = 5.5V
±0.5
±0.1
% / V
%/
°C
Ramp Valley Voltage
VLRVV
0.2
V
Ramp Peak Voltage
VLRPV
2.0
V
Ramp PWM Jitter
LFJ
1
s
VIN_SNS RAMP
Ramp Peak Clamp Voltage
VRPCV
VIN = 8V, C_P = C_R = 100pF, R_P = 100K
VDDP = 5V
5
VDDP
+0.9
V
VIN_SNS Discharge Current
IVRVV
7
12.5
18
mA
EE
LL
EE
CC
TT
RR
IICC
AA
LL
SS
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