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參數(shù)資料
| 型號： | LV8041FN |
| 元件分類： | 運動控制電子 |
| 英文描述： | STEPPER MOTOR CONTROLLER, 0.6 A, QCC52 |
| 封裝： | 7 X 7 MM, VQFN-52 |
| 文件頁數(shù)： | 7/24頁 |
| 文件大?。?/td> | 802K |
| 代理商： | LV8041FN |
LV8041FN
No.7944-15/24
Set Current Step Switching (CLK pin), Forward/Reverse Switching (D2 (F/R)) Basic Operation
CLK
D2 (F/R)
Channel
1 output
Channel
2 output
Position
number
Clockwise mode
Counter-
clockwise
mode
The IC internal D/A converter advances by one bit on the rising edge of each input clock pulse.
The clockwise/counterclockwise direction mode is switched by the D2 (F/R) data bit, and the direction in which the
position number advances is changed by switching this mode.
In clockwise mode, the channel 2 current phase is delayed by 90° as seen from the channel 1 current.
In counterclockwise mode, the channel 2 current phase leads by 90° as seen from the channel 1 current.
Output Enable (D7) and Reset (D6) Operational Description
0%
CLK
RST(D6)
Channel
1 output
Channel
2 output
MO
Initial mode
CLK
OE(D7)
Channel
1 output
Channel
2 output
MO
The outputs are in the high-impedance state
0%
Power saving
mode
When OE (D7) is set to 0, the outputs will be turned off on the next clock rising edge and set to the high-impedance state.
However, since the internal logic circuits continue to operate, the position number will advance if the clock signal is input.
Therefore, when OE (D7) is returned to 1, the IC will output levels according to the position number that has been
advanced by the clock input.
When RST (D6) is set to 0, the outputs are set to the initial state at the next clock rising edge, and the MO output goes to
the low level. When RST (D6) is set to one after that, the operation starts from the initial state on the next clock input, and
the position number begins advancing.
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