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參數(shù)資料
| 型號： | LV5254LG |
| 廠商： | SANYO SEMICONDUCTOR CO LTD |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PBGA24 |
| 封裝： | 3 X 3 MM, FLGA-24 |
| 文件頁數(shù)： | 8/14頁 |
| 文件大?。?/td> | 136K |
| 代理商： | LV5254LG |
LV5254LG
No.A0584-3/14
External Setting Mode
Outputs a voltage determined by external resistors and the external reference voltage.
See page 8, External Setting Mode Applications and the Output Voltage Setting Method for the method for setting the
VOUT voltage.
Ratings
Parameter
Symbol
Conditions
min
typ
max
Unit
Output voltage range
VOUT
*1
-4.5
-1
V
FB pin voltage
VFB
VDD = 5V, IOUT = 0 to 100mA
-5
20
mV
FB pin current
IFB
VDD = 5V, IOUT = 0 to 100mA
70
200
nA
*1 : The VOUT range that can be set and the current drive capacity of the charge pump regulator are, in principle, determined by the relationship between the
values of the VDD voltage and the set voltage. (See the "Relationship Between the Input and Output Voltages" ) Contact your SANYO Semiconductors
representative for more detailed information.
Logic Function Tables
The pins S1 and S2 must be connected to VDD (high) or ground (low) according to the mode to be used.
Mode
Description
S1
S2
Mode 1
Outputs a fixed voltage of -2.8V determined by an internal resistor.
High
Low
Mode 2
Outputs a voltage that is -1 times the voltage VS input to the VS pin.
Low
High
Mode 3
Outputs a voltage determined by an external resistor and the external reference voltage.
High
Package Dimensions
unit : mm (typ)
3330
3.0
3.
0
13
24
5
0.5
0.
5
0.
5
0.5
0.
8
0.
0NOM
0.
05
0.3
ED
C
B A
Top View
Side View
Bottom View
SANYO : FLGA24(3.0X3.0)
Ambient temperature, Ta – °C
Allowable
power
dissipation,
Pd
max
–
m
W
Pd max – Ta
0
0.6
0.7
0.4
0.2
0.8
– 20
60
80
40
20
0100
Specified board : 50
×40×0.8mm3
glass epoxy
4-layer (2S2P)
printed circuit board
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