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參數(shù)資料
| 型號： | LTM9010IY-14#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 21/40頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 14BIT UMODULE 140-BGA |
| 標準包裝： | 210 |
| 系列： | µModule® |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 105M |
| 數(shù)據(jù)接口： | Serial LVDS |
| 轉換器數(shù)目： | 8 |
| 功率耗散（最大）： | 1.11W |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 140-BFBGA |
| 供應商設備封裝： | 140-BGA（11.25x9） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 8 Differential; 8 Single-Ended |
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LTM9011-14/
LTM9010-14/LTM9009-14
28
9009101114fa
applicaTions inForMaTion
Digital Output Test Pattern
To allow in-circuit testing of the digital interface to the
A/D, there is a test mode that forces the A/D data outputs
(D13-D0) of all channels to known values. The digital
output test patterns are enabled by serially programming
mode control registers A3 and A4. When enabled, the test
patterns override all other formatting modes: 2’s comple-
ment and randomizer.
Output Disable
The digital outputs may be disabled by serially program-
ming mode control register A2. The current drive for all
digital outputs including DCO and FR are disabled to save
power or enable in-circuit testing. When disabled the com-
mon mode of each output pair becomes high impedance,
but the differential impedance may remain low.
Sleep and Nap Modes
The A/D may be placed in sleep or nap modes to conserve
power. In sleep mode the entire device is powered down,
resulting in 2mW power consumption. Sleep mode is
enabled by mode control register A1 (serial programming
mode), or by SDI (parallel programming mode). The time
required to recover from sleep mode is about 2ms.
In nap mode any combination of A/D channels can be
powered down while the internal reference circuits and the
PLL stay active, allowing faster wakeup than from sleep
mode. Recovering from nap mode requires at least 100
clock cycles. If the application demands very accurate DC
settling then an additional 50s should be allowed so the
on-chip references can settle from the slight temperature
shift caused by the change in supply current as the A/D
leaves nap mode. Nap mode is enabled by mode control
register A1 in the serial programming mode.
DEVICE PROGRAMMING MODES
The operating modes of the LTM9011-14/LTM9010-14/
LTM9009-14 can be programmed by either a parallel
interface or a simple serial interface. The serial interface
has more flexibility and can program all available modes.
Theparallelinterfaceismorelimitedandcanonlyprogram
some of the more commonly used modes.
Parallel Programming Mode
To use the parallel programming mode, PAR/SER should
be tied to VDD. The CS, SCK, SDI and SDO pins are binary
logic inputs that set certain operating modes. These pins
can be tied to VDD or ground, or driven by 1.8V, 2.5V, or
3.3V CMOS logic. When used as an input, SDO should
be driven through a 1k series resistor. Table 3 shows the
modes set by CS, SCK, SDI and SDO.
Table 3. Parallel Programming Mode Control Bits
(PAR/SER = VDD)
Pin
DESCRIPTION
CS
2-Lane / 1-Lane Selection Bit
0 = 2-Lane, 16-Bit Serialization Output Mode
1 = 1-Lane, 14-Bit Serialization Output Mode
SCK
LVDS Current Selection Bit
0 = 3.5mA LVDS Current Mode
1 = 1.75mA LVDS Current Mode
SDI
Power Down Control Bit
0 = Normal Operation
1 = Sleep Mode
SDO
Internal Termination Selection Bit
0 = Internal Termination Disabled
1 = Internal Termination Enabled
Serial Programming Mode
To use the serial programming mode, PAR/SER should be
tied to ground. The CS, SCK, SDI and SDO pins become a
serialinterfacethatprogramtheA/Dmodecontrolregisters.
Data is written to a register with a 16-bit serial word. Data
can also be read back from a register to verify its contents.
Serial data transfer starts when CS is taken low. The
data on the SDI pin is latched at the first 16 rising
edges of SCK. Any SCK rising edges after the first 16
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相關代理商/技術參數(shù) |
參數(shù)描述 |
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| LTM9011-14 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:Quad 14-Bit, 125Msps ADC with Integrated Drivers |
| LTM9011CY-14 | 制造商:Linear Technology 功能描述:ADC 14BIT UMODULE 140BGA 制造商:Linear Technology 功能描述:ADC, 14BIT, UMODULE, 140BGA |
| LTM9011CY-14#PBF | 功能描述:IC ADC 14BIT UMODULE 140BGA RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉換器 系列:µModule® 其它有關文件:TSA1204 View All Specifications 標準包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應商設備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個單端，單極；2 個差分，單極 產品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| LTM9011IY-14#PBF | 功能描述:IC ADC 14BIT UMODULE 140-BGA RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉換器 系列:µModule® 標準包裝:1 系列:microPOWER™ 位數(shù):8 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，SPI? 轉換器數(shù)目:1 功率耗散（最大）:- 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應商設備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數(shù)目和類型:8 個單端，單極 產品目錄頁面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
| LTM9012 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:Quad 14-Bit, 125Msps ADC with Integrated Drivers |
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