
LTM4600
17
4600fa
APPLICATIU
Layout Checklist/Example
The high integration of the LTM4600 makes the PCB board
layout very simple and easy. However, to optimize its electri-
cal and thermal performance, some layout considerations
are still necessary.
Use large PCB copper areas for high current path, in-
cluding V
IN
, PGND and V
OUT
. It helps to minimize the
PCB conduction loss and thermal stress
Place high frequency ceramic input and output capaci-
tors next to the V
IN
, PGND and V
OUT
pins to minimize
high frequency noise
Place a dedicated power ground layer underneath
the unit
To minimize the via conduction loss and reduce module
thermal stress, use multiple vias for interconnection
between top layer and other power layers
Do not put via directly on pad
Use a separated SGND ground copper area for compo-
nents connected to signal pins. Connect the SGND to
PGND underneath the unit
Figure 16 gives a good example of the recommended
layout.
W
U
U
Figure 16. Recommended PCB Layout
V
IN
PGND
TOP LAYER
V
OUT
SGND
4600 F16
LOAD
C
IN
Frequency Adjustment
The LTM4600 is designed to typically operate at 800kHz
across most input and output conditions. The f
ADJ
pin is
typically left open or decoupled with an optional 1000pf
capacitor. The switching frequency has been optimized for
maintaining constant output ripple noise over the operating
ranges. The switching frequency will increase up to typically
1.2MHz for 5V and 3.3V outputs to limit increase output
ripple noise. The switching frequency can be adjusted
lower to accommodate high duty cycle requirements like
5V to 3.3V, and 12V to 5V. There are limitations to input
voltage range for the higher duty cycle designs that limit
the internal inductor ripple current so that the inductor will
not saturate at higher load current. Examples:
LTM4600 minimum on-time = 100ns
LTM4600 minimum off-time = 400ns
Equations for setting frequency:
I
ON
= V
IN
– 0.7V/110k; for 12V input, I
ON
= 103μA
frequency = (I
ON
/[2.4V 10pF]) DC; DC = duty cycle,
duty cycle is (V
OUT
/V
IN
)
t = t
ON
+ t
OFF
, t
ON
= on-time, t
OFF
= off-time of the
switching period; t = 1/frequency
t
OFF
must be greater than 400ns, or t – t
ON
> 400ns.
t
ON
= DC t
1MHz frequency or 1μs period is chosen for 12V to 5V.
t
ON
= 0.41 1μs
410ns
t
OFF
= 1μs – 410ns
590ns
t
ON
and t
OFF
are above the minimums with adquate guard
band.
Using the frequency = (I
ON
/[2.4V 10pF]) DC, solve for
I
ON
= (1MHz 2.4V 10pF) (1/0.41)
58μA. I
ON
current
calculated from 12V input was 103μA, so a resistor from
f
ADJ
to ground = (0.7V/15k) = 46μA. 103μA – 46μA =
57μA, sets the adequate I
ON
current for proper frequency
range for the higher duty cycle conversion of 12V to
5V. Input voltage range is limited to 9V to 16V. Higher
input voltages can be used without the 15k on f
ADJ
. The