參數(shù)資料
型號: LTC6915IGN#TR
廠商: Linear Technology
文件頁數(shù): 6/18頁
文件大小: 0K
描述: IC PGA DIGITAL PREC 0DRFT 16SSOP
標準包裝: 2,500
放大器類型: 儀表
電路數(shù): 1
輸出類型: 滿擺幅
轉換速率: 0.2 V/µs
增益帶寬積: 200kHz
電流 - 輸入偏壓: 4nA
電壓 - 輸入偏移: 5µV
電流 - 電源: 1.73mA
電壓 - 電源,單路/雙路(±): 2.7 V ~ 11 V,±1.35 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-SSOP(0.154",3.90mm 寬)
供應商設備封裝: 16-SSOP
包裝: 帶卷 (TR)
LTC6915
14
6915fb
operaTion
Figure 4. 2 PGAs in a Daisy Chain
The amplifier’s gain is set as follows:
D3, D2, D1, D0
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101~
1111
Gain
0
1
2
4
8
16
32
64
128
256
512
1024
2048
4096
Input Voltage Range
The input common mode voltage range of the LTC6915
is rail-to-rail. However, the following equation limits the
size of the differential input voltage:
V≤ (VIN+ – VIN) + VREF ≤ V+ – 1.3
Where VIN+ and VIN– are the voltage of the differential
input pins, V+ and Vare the positive and negative sup-
ply voltages respectively and VREF is the voltage of REF
pin. In addition, VIN+ and VIN– must not exceed the power
supply voltages, i.e.,
V< VIN+ < V+ and V< VIN< V+
±5 Volt Operation
WhenusingtheLTC6915withsuppliesover5.5V,caremust
be taken to limit the maximum difference between any of
the input pins (IN+ or IN) and the REF pin to 5.5V, i.e.,
|VIN+ – VREF| < 5.5 and |VIN– VREF| < 5.5
If not, the device will be damaged. For example, if rail-
to-rail input operation is desired when the supplies are at
±5V, the REF pin should be 0, ±0.5V. As a second example,
if the V+ pin is 10V, and the Vand REF pins are at 0, the
inputs should not exceed 5.5V.
SHDN
IN
IN+
V
HOLD_THRU
CS(D0)
DIN(D1)
CLK(D2)
V+
OUT
SENSE
REF
NC
P/S
DGND
DOUT(D3)
LTC6915
#2
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VOUT
DOUT
VIN
0.1F
SHDN
IN
IN+
V
HOLD_THRU
CS(D0)
DIN(D1)
CLK(D2)
V+
OUT
SENSE
REF
NC
P/S
DGND
DOUT(D3)
LTC6915
#1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VOUT
VIN
0.1F
P
–5V
0.1F
–5V
6915 F04
CS
DIN
CLK
DIN
CS/LD
D15
D11
D10
D9
D8
D7
D3
D2
D1
D0
GAIN CODE FOR #2
GAIN CODE FOR #1
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