參數(shù)資料
型號(hào): LTC6078
廠商: Linear Technology Corporation
英文描述: 16-/14-/12-Bit VOUT DACs in 3mm 】 3mm DFN
中文描述: 16/14/12 VOUT電源數(shù)模轉(zhuǎn)換器采用3mm DFN封裝】3毫米
文件頁數(shù): 5/20頁
文件大小: 317K
代理商: LTC6078
LTC2641/LTC2642
5
26412f
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
Continuous operation above the specified maximum operating
junction temperature may impair device reliability.
Note 3:
LTC2641-16/LTC2642-16 ±1LSB = ±0.0015% = ±15.3ppm of full
scale. LTC2641-14/LTC2642-14 ±1LSB = ±0.006% = ±61ppm of full scale.
LTC2641-12/LTC2642-12 ±1LSB = ±0.024% = ±244ppm of full scale.
ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifications are at T
A
= 25°C. V
DD
= 3V or 5V, V
REF
= 2.5V, C
L
= 10pF, GND = 0, R
L
= ∞
unless
otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
I
IN
Digital Input Current
V
IN
= GND to V
CC
C
IN
Digital Input Capacitance
(Note 6)
V
H
Hysteresis Voltage
Power Supply
V
DD
Supply Voltage
I
DD
Supply Current, V
DD
Digital Inputs = 0V or V
DD
P
D
Power Dissipation
Digital Inputs = 0V or V
DD
, V
DD
= 5V
Digital Inputs = 0V or V
DD
, V
DD
= 3V
The
denotes the specifications which apply over the full operating
MIN
TYP
MAX
±1
10
UNITS
μA
pF
V
3
0.15
2.7
5.5
200
V
120
0.60
0.36
μA
mW
mW
TIMING CHARACTERISTICS
range, otherwise specifications are at T
A
= 25°C. V
DD
= 3V or 5V, V
REF
= 2.5V, C
L
= 10pF, GND = 0, R
L
= ∞
unless otherwise specified.
The
denotes the specifications which apply over the full operating temperature
SYMBOL
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
f
SCLK
PARAMETER
DIN Valid to SCLK Setup Time
DIN Valid to SCLK Hold Time
SCLK Pulse Width High
SCLK Pulse Width Low
C
S Pulse High Width
LSB SCLK High to
C
S High
C
S Low to SCLK High
C
S High to SCLK Positive Edge
C
L
R Pulse Width Low
SCLK Frequency
V
DD
High to
C
S Low (Power-Up Delay)
CONDITIONS
MIN
10
0
9
9
10
8
8
8
15
TYP
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
50% Duty Cycle
50
MHz
μs
30
Note 4:
R
OUT
tolerance is typically ±20%.
Note 5:
Reference input resistance is code dependent. Minimum is at
871Chex (34,588) in unipolar mode and at 671Chex (26, 396) in bipolar
mode.
Note 6:
Guaranteed by design and not production tested.
Note 7:
Guaranteed by gain error and offset error testing, not production
tested.
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