參數(shù)資料
型號(hào)： LTC4274CUHF#PBF
廠商： Linear Technology
文件頁(yè)數(shù)： 25/28頁(yè)
文件大?。?/td> 702K
描述： IC CONTROLLER POE 38-QFN
標(biāo)準(zhǔn)包裝： 52
類型： 以太網(wǎng)供電 PSE 控制器（PoE）
應(yīng)用： 供電設(shè)備（PSE）
內(nèi)部開(kāi)關(guān)： 無(wú)
電流限制： 可調(diào)
電源電壓： 3 V ~ 4.3 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 38-QFN
供應(yīng)商設(shè)備封裝： 38-QFN（5x7）裸露焊盤(pán)
包裝： 管件
LTC4274
25
4274fd
Sense Resistor
The LTC4274 is designed to use either 0.5?or 0.25?
current sense resistors. For new designs 0.25?is recom-
mended to reduce power dissipation; the 0.5?option is
intended for existing systems where the LTC4274 is used
as a drop-in replacement for the LTC4258 or LTC4259A.
The lower sense resistor values reduce heat dissipation.
Four commonly available 1?resistors (0402 or larger
package size) can be used in parallel in place of a single
0.25?resistor. In order to meet the I
CUT
 and I
LIM
 accuracy
required by the IEEE specification, the sense resistors
should have ?% tolerance or better, and no more than
?00ppm/癈 temperature coefficient.
Output Cap
The port requires a 0.22糉 cap across its output to keep
the LTC4274 stable while in current limit during startup
or overload. Common ceramic capacitors often have sig-
nificant voltage coefficients; this means the capacitance
is reduced as the applied voltage increases. To minimize
this problem, X7R ceramic capacitors rated for at least
100V are recommended.
ESD/Cable Discharge Protection
Ethernet ports can be subject to significant ESD events
when long data cables, each potentially charged to thou-
sands of volts, are plugged into the low impedance of the
RJ45 jack. To protect against damage, the port requires a
pair of clamp diodes; one to AGND and one to V
EE
 (Figure
10). An additional surge suppressor is required for each
LTC4274 chip from V
EE
 to AGND. The diodes at the port
steer harmful surges into the supply rails, where they are
absorbed by the surge suppressor and the V
EE
 bypass
capacitance. The surge suppressor has the additional
benefit of protecting the LTC4274 from transients on the
V
EE
 supply.
S1B diodes work well as port clamp diodes, and an
SMAJ58A or equivalent is recommended for the V
EE
 surge
suppressor.
LAYOUT GUIDELINES
Standard power layout guidelines apply to the LTC4274:
place the decoupling caps for the V
DD
 and V
EE
 supplies
near their respective supply pins, use ground planes, and
use wide traces wherever there are significant currents.
APPLICATIONS INFORMATION
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