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參數(shù)資料
| 型號： | LTC4268IDKD-1#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 18/46頁 |
| 文件大?。?/td> | 419K |
| 描述： | IC PD HIGH POWER W/CNTRL 32-DFN |
| 產(chǎn)品培訓(xùn)模塊： | Power over Ethernet |
| 標(biāo)準(zhǔn)包裝： | 52 |
| 類型： | 以太網(wǎng)供電開關(guān)（PoE） |
| 應(yīng)用： | 遠(yuǎn)程外設(shè)（工業(yè)控制，相機(jī)，數(shù)據(jù)訪問） |
| 內(nèi)部開關(guān)： | 是 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-WFDFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 32-DFN（7x4）裸露焊盤 |
| 包裝： | 管件 |
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LTC4268-1
18
42681fc
During the inrush event as C1 is being charged, a large
amount of power is dissipated in the MOSFET. The
LTC4268-1 is designed to accept this load and is thermally
protected to avoid damage to the onboard power MOSFET.
If a thermal overload does occur, the power MOSFET turns
off, allowing the die to cool. Once the die has returned to
a safe temperature, the LTC4268-1 automatically switches
to I
LIMIT_LOW
, and load capacitor C1 charging resumes.
The LTC4268-1 has the option of disabling the normal
operating input current limit, I
LIMIT_HIGH
, for custom
high power PoE applications. To disable the current limit,
connect I
LIM_EN
to V
PORTN
. To protect the LTC4268-1
from damage when the normal current limit is disabled, a
safeguard current limit, I
LIMIT_DISA
keeps the current below
destructive levels, typically 1.4A. Note that continuous
operation at or near the safeguard current limit will rapidly
overheat the LTC4268-1, engaging the thermal protection
circuit. For normal operations, float the I
LIM_EN
pin. The
LTC4268-1 maintains the I
LIMIT_LOW
inrush current limit
for charging the load capacitor regardless of the state of
I
LIM_EN
. The operation of the I
LIM_EN
pin is summarized
in Table 3.
Table 3. Summary of IEEE 802.3af Power Classifications and
LTC4268-1 R
CLASS
Resistor Selection
STATE OF I
LIM_EN
INRUSH CURRENT
LIMIT
OPERATING INPUT
CURRENT LIMIT
Floating
I
LIMIT_LOW
I
LIMT_HIGH
Tied to V
PORTN
I
LIMIT_LOW
I
LIMIT_DISA
POWER GOOD
The LTC4268-1 includes complementary power good
outputs (Figure 8) to simplify connection to any DC/DC
converter. Power Good is asserted at the end of the inrush
event when load capacitor C1 is fully charged and the
DC/DC converter can safely begin operation. The power
good signal stays active during normal operation and is
de-asserted at power off when the port drops below the
UVLO threshold or in the case of a thermal overload event.
For PD designs that use a large load capacitor and also
applicaTions inForMaTion
42681 F08
BOLD LINE INDICATES HIGH CURRENT PATH
PWRGD
POWER
NOT
GOOD
INRUSH COMPLETE
AND NOT IN THERMAL SHUTDOWN
V
PORT
< UVLO OFF
OR THERMAL SHUTDOWN
POWER
GOOD
29
PWRGD
LTC4268-1
30
V
NEG
28
V
NEG
26
V
PORTN
7
V
NEG
27
V
PORTN
6
V
PORTN
REF
UVLO
THERMAL SD
5
CONTROL
CIRCUIT
Figure 8. LTC4268-1 Power Good Functional and State Diagram
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| LTC4269CDKD-1#PBF | 功能描述:IC PD/OPTO FLYBACK CTRLR 32-DFN RoHS:是 類別:集成電路 (IC) >> PMIC - 熱交換 系列:- 標(biāo)準(zhǔn)包裝:50 系列:- 類型:熱交換控制器 應(yīng)用:-48V 遠(yuǎn)程電力系統(tǒng)，AdvancedTCA ? 系統(tǒng)，高可用性 內(nèi)部開關(guān):無 電流限制:可調(diào) 電源電壓:11.5 V ~ 14.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:10-TFSOP，10-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:10-MSOP 包裝:管件 |
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