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| 型號： | LTC4266IGW#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 8/30頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CTRLR IEEE 802.3AT 36-SSOP |
| 產(chǎn)品培訓(xùn)模塊： | Power over Ethernet |
| 標(biāo)準(zhǔn)包裝： | 32 |
| 控制器類型： | 以太網(wǎng)控制器（IEEE 802.3） |
| 接口： | I²C，2 線串口 |
| 電源電壓： | 3.3V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 36-BSOP（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 36-SSOP |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 1338 (CN2011-ZH PDF) |
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LTC4266
16
4266fd
APPLICATIONS INFORMATION
Operating Modes
The LTC4266 includes four independent ports, each of
which can operate in one of four modes: manual, semi-
auto, AUTO pin or shutdown.
Table 1. Operating Modes
MODE
AUTO
PIN
OPMD
DETECT/
CLASS
POWER-UP
AUTOMATIC
ICUT/ILIM
ASSIGNMENT
AUTO Pin
1
11b
Enabled at
Reset
Automatically
Yes
Reserved
0
11b
N/A
Semi-auto
0
10b
Host
Enabled
Upon
Request
No
Manual
0
01b
Once Upon
Request
Upon
Request
No
Shutdown
0
00b
Disabled
No
In manual mode, the port waits for instructions from the
host system before taking any action. It runs a single
detection or classification cycle when commanded to
by the host, and reports the result in its Port Status
register. The host system can command the port to turn
on or off the power at any time. This mode should only
be used for diagnostic and test purposes.
In semi-auto mode, the port repeatedly attempts to
detect and classify any PD attached to it. It reports the
status of these attempts back to the host, and waits for
a command from the host before turning on power to
the port. The host must enable detection (and optionally
classification) for the port before detection will start.
AUTO pin mode operates the same as semi-auto mode
except that it will automatically turn on the power to the
port if detection is successful. In AUTO pin mode, ICUT
and ILIMvaluesaresetautomaticallybytheLTC4266.This
operational mode is only valid if the AUTO pin is high at
reset or power-up and remains high during operation.
In shutdown mode, the port is disabled and will not
detect or power a PD.
Regardless of which mode it is in, the LTC4266 will remove
power automatically from any port that generates a current
limit fault. It will also automatically remove power from
any port that generates a disconnect event if disconnect
detection is enabled. The host controller may also com-
mand the port to remove power at any time.
Reset and the AUTO/MID Pins
The initial LTC4266 configuration depends on the state
of the AUTO and MID pins during reset. Reset occurs at
power-up, or whenever the RESET pin is pulled low or
the global Reset All bit is set. Changing the state of AUTO
or MID after power-up will not properly change the port
behavior of the LTC4266 until a reset occurs.
Although typically used with a host controller, the LTC4266
can also be used in a standalone mode with no connec-
tion to the serial interface. If there is no host present, the
AUTO pin must be tied high so that, at reset, all ports will
be configured to operate automatically. Each port will
detect and classify repeatedly until a PD is discovered,
set ICUT and ILIM according to the classification results,
apply power after successful detection, and remove power
when a PD is disconnected. Similarly, if the standalone
application is a midspan, the MID pin must be tied high
to enable correct midspan detection timing.
Table 2 shows the ICUT and ILIM values that will be automati-
cally set in AUTO pin mode, based on the discovered class.
Table 2. ICUT and ILIM Values in AUTO pin mode
CLASS
ICUT
ILIM
Class 1
112mA
425mA
Class 2
206mA
425mA
Class 3 or Class 0
375mA
425mA
Class 4
638mA
850mA
The automatic setting of the ICUT and ILIM values only oc-
curs if the LTC4266 is reset with the AUTO pin high.
DETECTION
Detection Overview
To avoid damaging network devices that were not designed
to tolerate DC voltage, a PSE must determine whether the
connected device is a real PD before applying power. The
IEEE specification requires that a valid PD have a common
mode resistance of 25k ±5% at any port voltage below 10V.
The PSE must accept resistances that fall between 19k and
26.5k, and it must reject resistances above 33kΩ or below
15k (shaded regions in Figure 11). The PSE may choose to
accept or reject resistances in the undefined areas between
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