I2C TIMING DIAGRAMS Figure 6. Writing to a Register Figure 7. " />
參數(shù)資料
型號(hào)： LTC4266IGW#PBF
廠商： Linear Technology
文件頁(yè)數(shù)： 3/30頁(yè)
文件大?。?/td> 0K
描述： IC CTRLR IEEE 802.3AT 36-SSOP
產(chǎn)品培訓(xùn)模塊： Power over Ethernet
標(biāo)準(zhǔn)包裝： 32
控制器類型： 以太網(wǎng)控制器（IEEE 802.3）
接口： I²C，2 線串口
電源電壓： 3.3V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 36-BSOP（0.295"，7.50mm 寬）
供應(yīng)商設(shè)備封裝： 36-SSOP
包裝： 管件
產(chǎn)品目錄頁(yè)面： 1338 (CN2011-ZH PDF)
LTC4266
11
4266fd
I2C TIMING DIAGRAMS
Figure 6. Writing to a Register
Figure 7. Reading from a Register
SCL
SDA
4266 F06
00
1
AD3 AD2 AD1 AD0
A7
A6
A5
A4
A3
A2
A1
A0
R/W ACK
D7
D6
D5
D4
D3
D2
D1
D0
ACK
START BY
MASTER
ACK BY
SLAVE
ACK BY
SLAVE
ACK BY
SLAVE
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
REGISTER ADDRESS BYTE
FRAME 3
DATA BYTE
STOP BY
MASTER
SCL
SDA
00
1
AD3 AD2 AD1 AD0
A7
A6
A5
A4
A3
A2
A1
A0
R/W ACK
ACK
00
1
AD3 AD2 AD1 AD0
D7
D6
D5
D4
D3
D2
D1
D0
R/W ACK
ACK
START BY
MASTER
ACK BY
SLAVE
ACK BY
SLAVE
4266 F07
STOP BY
MASTER
REPEATED
START BY
MASTER
ACK BY
SLAVE
NO ACK BY
MASTER
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
REGISTER ADDRESS BYTE
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
DATA BYTE
Figure 8. Reading the Interrupt Register (Short Form)
Figure 9. Reading from Alert Response Address
SCL
SDA
4266 F08
01
0
AD3 AD2 AD1 AD0
D7
D6
D5
D4
D3
D2
D1
D0
R/W ACK
ACK
START BY
MASTER
ACK BY
SLAVE
NO ACK BY
MASTER
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
DATA BYTE
STOP BY
MASTER
SCL
SDA
4266 F09
00
1
0
AD3
0
1
AD2 AD1 AD0
R/W ACK
ACK
1
START BY
MASTER
ACK BY
SLAVE
NO ACK BY
MASTER
FRAME 1
ALERT RESPONSE ADDRESS BYTE
FRAME 2
SERIAL BUS ADDRESS BYTE
STOP BY
MASTER
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參數(shù)描述
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