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參數(shù)資料
| 型號： | LTC4245CG#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 15/36頁 |
| 文件大?。?/td> | 431K |
| 描述： | IC CNTRLR HOT SWAP 36-SSOP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 類型： | 熱交換控制器 |
| 應(yīng)用： | CompactPCI? |
| 內(nèi)部開關(guān)： | 無 |
| 電源電壓： | 3.3V，5V，12V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 36-SSOP（0.209"，5.30mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 36-SSOP |
| 包裝： | 帶卷 (TR) |
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LTC4245
15
4245fa
The typical LTC4245 application is in a high availability sys-
tem where boards using multiple supplies are hot plugged.
The device enables the system to periodically monitor board
power consumption and fault status over the I
2
C interface.
Boards in CompactPCI and PCI Express systems typically
utilize three to four supplies. Figure 1 shows the LTC4245
being used in a CompactPCI application.
The following sections describe the turn on, turn off and
fault response behavior of the LTC4245. The ADC and I
2
C
interface are discussed next. External component selection
is discussed in detail in the Design Example section.
CPCI Connection Pin Sequence
The staggered lengths of the CPCI male connector pins on
the backplane ensures that all power supplies are physi-
cally connected to the LTC4245 before back-end power
is allowed to ramp up (BD_SEL# asserted low). The long
pins, which include 5V, 3.3V, V(I/O) and GND, mate rst.
The short BD_SEL# pin mates last. At least one long 3.3V
power pin must be connected to the LTC4245 in order for
the PRECHARGE pin voltage to be available before the
CPCI bus pins mate.
The following is a typical hot plug sequence.
1. ESD clips make contact.
2. Long power and ground pins make contact and Early
Power is established. The 1V precharge voltage
becomes valid at this stage. Power is also applied
to the pull-up resistors connected to the HEALTHY#
and BD_SEL# signals. LOCAL_PCI_RST# is held
in reset. All power switches are held off at this stage
of insertion.
3. Medium length pins make contact. The 12V and 12V
connector pins make contact at this stage. The
internal low voltage supply of the LTC4245 (INTV
CC
)
powers up from the 12V supply. An internal 10糀
pull-up from INTV
CC
to BD_SEL# turns on. Other
connector pins that mate are HEALTHY#, PCI_RST#
and the bus I/O pins (which are precharged to 1V).
4. Short pins make contact. If the BD_SEL# signal is
grounded on the backplane, the plug-in board
power-up cycle may begin immediately. If the ON pin
is tied high then turn-on is automatic, else the LTC4245
waits for a serial bus turn-on command. System
backplanes that do not ground the BD_SEL# signal
will instead have circuitry that detects when
BD_SEL# makes contact with the plug-in board. The
system logic can then control the power up process
by pulling BD_SEL# low. The precharge potential may
be optionally disconnected from the CPCI bus signals
at this stage.
Turn-On
The back-end power planes are isolated from the input
power planes by external N-channel pass transistors Q1
through Q4. Sense resistors R1 to R4 provide current
fault detection. Resistors R5 to R8 prevent high frequency
oscillations in MOSFETs Q1 to Q4 respectively.
The following conditions must be satis ed for a duration of
100ms before the external switches can be turned on.
1. All input supplies and the internally generated supply,
INTV
CC
, must exceed their undervoltage lockout
thresholds. The V
EE
undervoltage lockout can be
disabled by not tying the CFG pin low.
2. No undervoltage, overcurrent or PGI fault bits must
be set unless the corresponding auto-retry is enabled.
When 12V
IN
powers up for the rst time, INTV
CC
rises above its undervoltage threshold which
generates a 60約 to 120約 internal power-on-reset
pulse. During reset, the fault registers are cleared
and the control bits are initialized. If INTV
CC
is already
up, then the I
2
C interface can be used to clear the
fault bits or set the auto-retry bits.
3. The BD_SEL# pin must be pulled low.
When these initial conditions are satis ed, the ON pin is
checked. If it is high, the four FET On control bits (D0 to
D3) are set either simultaneously (the default state) or
in a 12V, 5V, 3.3V, 12V sequence (register bit C6 set).
If ON is low, the external switches turn on when the ON
pin is brought high or if a serial bus turn-on command
is received. Figure 2 shows all supplies turning on after
BD_SEL# goes low.
APPLICATIO S I FOR ATIO
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| LTC4245CUHF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:Multiple Supply Hot Swap Controller with I2C Compatible Monitoring |
| LTC4245CUHF#PBF | 功能描述:IC CNTRLR HOT SWAP 38-QFN RoHS:是 類別:集成電路 (IC) >> PMIC - 熱交換 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:119 系列:- 類型:熱交換控制器 應(yīng)用:通用型，PCI Express? 內(nèi)部開關(guān):無 電流限制:- 電源電壓:3.3V，12V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:80-TQFP 供應(yīng)商設(shè)備封裝:80-TQFP（12x12） 包裝:托盤 產(chǎn)品目錄頁面:1423 (CN2011-ZH PDF) |
| LTC4245CUHF#TRPBF | 功能描述:IC CNTRLR HOT SWAP 38-QFN RoHS:是 類別:集成電路 (IC) >> PMIC - 熱交換 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:119 系列:- 類型:熱交換控制器 應(yīng)用:通用型，PCI Express? 內(nèi)部開關(guān):無 電流限制:- 電源電壓:3.3V，12V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:80-TQFP 供應(yīng)商設(shè)備封裝:80-TQFP（12x12） 包裝:托盤 產(chǎn)品目錄頁面:1423 (CN2011-ZH PDF) |
| LTC4245IG | 制造商:LINER 制造商全稱:Linear Technology 功能描述:Multiple Supply Hot Swap Controller with I2C Compatible Monitoring |
| LTC4245IG#PBF | 功能描述:IC CNTRLR HOT SWAP 36-SSOP RoHS:是 類別:集成電路 (IC) >> PMIC - 熱交換 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:119 系列:- 類型:熱交換控制器 應(yīng)用:通用型，PCI Express? 內(nèi)部開關(guān):無 電流限制:- 電源電壓:3.3V，12V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:80-TQFP 供應(yīng)商設(shè)備封裝:80-TQFP（12x12） 包裝:托盤 產(chǎn)品目錄頁面:1423 (CN2011-ZH PDF) |
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