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參數(shù)資料
| 型號(hào)： | LTC4000EUFD#PBF |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PQCC28 |
| 封裝： | 4 X 5 MM, LEAD FREE, PLASTIC, MO-220WXXX-X, QFN-28 |
| 文件頁數(shù)： | 8/40頁 |
| 文件大小： | 428K |
| 代理商： | LTC4000EUFD#PBF |
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LTC4000
16
4000f
operaTion
to be approximately 86% of the final float voltage level
(VOUT(INST_ON)). This feature provides a CSP voltage sig-
nificantly higher than the battery voltage when charging
into a heavily discharged battery. This instant-on feature
allows the LTC4000 to provide sufficient voltage at the
output (CSP pin), independent of the battery voltage.
Thesecondregionofoperationiswhenthebatteryfeedback
voltage is greater than or equal to the instant-on threshold
(VOUT(INST_ON)). In this region, the BGATE pin is driven
low and clamped at VBGATE(ON) to allow the PMOS to turn
completely on, reducing any power dissipation due to the
charge current.
Battery Temperature Qualified Charging
The battery temperature is measured by placing a nega-
tive temperature coefficient (NTC) thermistor close to the
battery pack. The comparators CP3 and CP4 implement
the temperature detection as shown in the Block Diagram
in Figure 1. The rising threshold of CP4 is set at 75% of
VBIAS (cold threshold) and the falling threshold of CP3 is
set at 35% of VBIAS (hot threshold). When the voltage at
the NTC pin is above 75% of VBIAS or below 35% of VBIAS
then the LTC4000 pauses any charge cycle in progress.
When the voltage at the NTC pin returns to the range of
40% to 70% of VBIAS, charging resumes.
When charging is paused, the external charging PMOS
turns off and charge current drops to zero. If the LTC4000
is charging in the constant voltage mode and the charge
termination timer is enabled, the timer pauses until the
thermistor indicates a return to a valid temperature. If the
battery charger is in the trickle charge mode and the bad
battery detection timer is enabled, the bad battery timer
pauses until the thermistor indicates a return to a valid
temperature.
Input UVLO and Voltage Monitoring
The regulated voltage on the BIAS pin is available as soon
as VIN ≥ 3V. When VIN ≥ 3V, the FBG pin is pulled low to
GND with a typical resistance of 100Ω and the rest of the
chip functionality is enabled.
When the IN pin is high impedance and a battery is con-
nected to the BAT pin, the BGATE pin is pulled down with
a 2μA (typical) current source to hold the battery PMOS
gate voltage at VBGATE(ON) below VBAT. This allows the
battery to power the output. The total quiescent current
consumed by LTC4000 from the battery when IN is not
valid is typically ≤ 10A.
BesidestheinternalinputUVLO,theLTC4000alsoprovides
voltage monitoring through the VM pin. The RST pin is
pulled low when the voltage on the VM pin falls below
1.193V (typical). On the other hand, when the voltage on
the VM pin rises above 1.233V (typical), the RST pin is
high impedance.
One common use of this voltage monitoring feature is to
ensure that the converter is turned off when the voltage
at the input is below a certain level. In this case, connect
the RST pin to the DC/DC converter chip select or enable
pin (see Figure 6).
Figure 6. Input Voltage Monitoring with RST Connected to
the EN Pin of the DC/DC Converter
IN
CP1
LTC4000
IN
CLN
RST
RIS
VM
4000 FO6
RVM2
RVM1
1.193V
+
–
IN
DC/DC
CONVERTER
EN
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