參數(shù)資料
型號(hào): LTC3880IUJ#PBF
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: 0.1 A DUAL SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, PQCC40
封裝: 6 X 6 MM, LEAD FREE, PLASTIC, WJJD-2, QFN-40
文件頁(yè)數(shù): 99/112頁(yè)
文件大?。?/td> 2182K
代理商: LTC3880IUJ#PBF
LTC3880/LTC3880-1
87
3880fa
BIT(S)
SYMBOL
OPERATION
B[14]
Mfr_gpio_propagate_short_CMD_cycle 0: No action
1: Asserts low if commanded off then on before the output has sequenced off. Re-asserts high
120ms after sequence off.
b[13]
Mfr_gpio_propagate_ton_max_fault
0: No action if a TON_MAX_FAULT fault is asserted
1: Associated output will be asserted low if a TON_MAX_FAULT fault is asserted
GPIO0 is associated with page 0 TON_MAX_FAULT faults
GPIO1 is associated with page 1 TON_MAX_FAULT faults
b[12]
Mfr_gpio0_propagate_vout_uvuf,
Mfr_gpio1_propagate_vout_uvuf
Unfiltered VOUT_UV_FAULT_LIMIT comparator output
GPIO0 is associated with channel 0
GPIO1 is associated with channel 1
b[11]
Mfr_gpio0_propagate_int_ot,
Mfr_gpio1_propagate_int_ot
0: No action if the MFR_OT_FAULT_LIMIT fault is asserted
1: Associated output will be asserted low if the MFR_OT_FAULT_LIMIT fault is asserted
b[10]
Mfr_pwrgd1_en (Note 1)
0: No action if channel 1 POWER_GOOD is not true
1: Associated output will be asserted low if channel 1 POWER_GOOD is not true
If this bit is asserted, the GPIO_FAULT_RESPONSE must be ignore. If the GPIO_FAULT_
RESPONSE is not set to ignore, the part will latch off and never be able to start.
b[9]
Mfr_pwrgd0_en (Note 1)
0: No action if channel 0 POWER_GOOD is not true
1: Associated output will be asserted low if channel 0 POWER_GOOD is not true
If this bit is asserted, the GPIO_FAULT_RESPONSE must be ignore. If the GPIO_FAULT_
RESPONSE is not set to ignore, the part will latch off and never be able to start.
b[8]
Mfr_gpio0_propagate_ut,
Mfr_gpio1_propagate_ut
0: No action if the UT_FAULT_LIMIT fault is asserted
1: Associated output will be asserted low if the UT_FAULT_LIMIT fault is asserted
GPIO0 is associated with page 0 UT faults
GPIO1 is associated with page 1 UT faults
b[7]
Mfr_gpio0_propagate_ot,
Mfr_gpio1_propagate_ot
0: No action if the OT_FAULT_LIMIT fault is asserted
1: Associated output will be asserted low if the OT_FAULT_LIMIT fault is asserted
GPIO0 is associated with page 0 OT faults
GPIO1 is associated with page 1 OT faults
b[6]
Reserved
b[5]
Reserved
b[4]
Mfr_gpio0_propagate_input_ov,
Mfr_gpio1_propagate_input_ov
0: No action if the VIN_OV_FAULT_LIMIT fault is asserted
1: Associated output will be asserted low if the VIN_OV_FAULT_LIMIT fault is asserted
b[3]
Reserved
b[2]
Mfr_gpio0_propagate_iout_oc,
Mfr_gpio1_propagate_iout_oc
0: No action if the IOUT_OC_FAULT_LIMIT fault is asserted
1: Associated output will be asserted low if the IOUT_OC_FAULT_LIMIT fault is asserted
GPIO0 is associated with page 0 OC faults
GPIO1 is associated with page 1 OC faults
b[1]
Mfr_gpio0_propagate_vout_uv,
Mfr_gpio1_propagate_vout_uv
0: No action if the VOUT_UV_FAULT_LIMIT fault is asserted
1: Associated output will be asserted low if the VOUT_UV_FAULT_LIMIT fault is asserted
GPIO0 is associated with page 0 UV faults
GPIO1 is associated with page 1 UV faults
b[0]
Mfr_gpio0_propagate_vout_ov,
Mfr_gpio1_propagate_vout_ov
0: No action if the VOUT_OV_FAULT_LIMIT fault is asserted
1: Associated output will be asserted low if the VOUT_OV_FAULT_LIMIT fault is asserted
GPIO0 is associated with page 0 OV faults
GPIO1 is associated with page 1 OV faults
Note 1: The PWRGD status is designed as an indicator and not to be used for power supply sequencing.
PMBus COMMAND DETAILS
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相關(guān)代理商/技術(shù)參數(shù)
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