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參數(shù)資料
| 型號： | LTC3810IG#TR |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | SWITCHING CONTROLLER, PDSO28 |
| 封裝： | 5.30 MM, PLASTIC, SSOP-28 |
| 文件頁數(shù)： | 8/36頁 |
| 文件大?。?/td> | 495K |
| 代理商： | LTC3810IG#TR |
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LTC3810
16
3810fb
The most important parameter in high voltage applications
is breakdown voltage BVDSS. Both the top and bottom
MOSFETs will see full input voltage plus any additional
ringing on the switch node across its drain-to-source dur-
ing its off-time and must be chosen with the appropriate
breakdown specication. Since most MOSFETs in the 60V
to 100V range have higher thresholds (typically VGS(MIN)
≥ 6V), the LTC3810 is designed to be used with a 6.2V to
14V gate drive supply (DRVCC pin).
For maximum efciency, on-resistance RDS(ON) and input
capacitance should be minimized. Low RDS(ON) minimizes
conduction losses and low input capacitance minimizes
transition losses. MOSFET input capacitance is a combi-
nation of several components but can be taken from the
typical “gate charge” curve included on most data sheets
(Figure 6).
The curve is generated by forcing a constant input cur-
rent into the gate of a common source, current source
loaded stage and then plotting the gate voltage versus
time. The initial slope is the effect of the gate-to-source
and the gate-to-drain capacitance. The at portion of the
curve is the result of the Miller multiplication effect of the
drain-to-gate capacitance as the drain drops the voltage
across the current source load. The upper sloping line is
due to the drain-to-gate accumulation capacitance and
the gate-to-source capacitance. The Miller charge (the
increase in coulombs on the horizontal axis from a to b
while the curve is at) is specied for a given VDS drain
voltage, but can be adjusted for different VDS voltages by
multiplying by the ratio of the application VDS to the curve
specied VDS values. A way to estimate the CMILLER term
is to take the change in gate charge from points a and b
on a manufacturers data sheet and divide by the stated
VDS voltage specied. CMILLER is the most important se-
lection criteria for determining the transition loss term in
the top MOSFET but is not directly specied on MOSFET
data sheets. CRSS and COS are specied sometimes but
denitions of these parameters are not included.
When the controller is operating in continuous mode the
duty cycles for the top and bottom MOSFETs are given by:
MainSwitchDutyCycle
=
VOUT
VIN
SynchronousSwitchDutyCycle
=
VIN –VOUT
VIN
The power dissipation for the main and synchronous
MOSFETs at maximum output current are given by:
PTOP =
VOUT
VIN
IMAX
()2(
T )RDS(ON) +
VIN
2 IMAX
2
(RDR)(CMILLER)
1
VCC –VTH(IL)
+
1
VTH(IL)
(f)
PBOT =
VIN –VOUT
VIN
(IMAX)
2(
T )RDS(0N)
where
ρT is the temperature dependency of RDS(ON), RDR
is the effective top driver resistance (approximately 2
Ω at
VGS = VMILLER), VIN is the drain potential and the change
in drain potential in the particular application. VTH(IL) is
the data sheet specied typical gate threshold voltage
specied in the power MOSFET data sheet at the specied
drain current. CMILLER is the calculated capacitance using
the gate charge curve from the MOSFET data sheet and
the technique described above.
Both MOSFETs have I2R losses while the topside N-channel
equation incudes an additional term for transition losses,
which peak at the highest input voltage. For high input
voltage low duty cycle applications that are typical for the
LTC3810, transition losses are the dominate loss term and
therefore using higher RDS(ON) device with lower CMILLER
usually provides the highest efciency. The synchronous
MOSFET losses are greatest at high input voltage when
the top switch duty factor is low or during a short circuit
when the synchronous switch is on close to 100% of
Figure 6. Gate Charge Characteristic
APPLICATIONS INFORMATION
+
–
VDS
VIN
VGS
MILLER EFFECT
QIN
ab
CMILLER = (QB – QA)/VDS
VGS
V
+
–
3810 F06
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