參數(shù)資料
型號(hào): LTC3617EUDD#PBF
廠商: LINEAR TECHNOLOGY CORP
元件分類(lèi): 穩(wěn)壓器
英文描述: 14 A SWITCHING REGULATOR, 2700 kHz SWITCHING FREQ-MAX, PQCC24
封裝: 3 X 5 MM, LEAD FREE, PLASTIC, QFN-24
文件頁(yè)數(shù): 8/20頁(yè)
文件大?。?/td> 471K
代理商: LTC3617EUDD#PBF
LTC3617
16
3617fa
Remembering that the above junction temperature is
obtained from the RDS(ON) at 25°C, we might recalculate
the junction temperature based on a higher RDS(ON) since
it increases with temperature. Redoing the calculation
assuming that RSW increased 15% at 73°C yields a new
junction temperature of 79°C. Therefore, we can safely as-
sume that the actual junction temperature will not exceed
the absolute maximum junction temperature of 125°C.
Note that for very low input voltage, the junction tempera-
ture will be higher due to increased switch resistance,
RDS(ON). It is not recommended to use full load current
with high ambient temperature and low input voltage.
To maximize the thermal performance of the LTC3617 the
exposed pad must be soldered to a ground plane. See the
PCB Layout Board Checklist.
Design Example
As a design example, consider the LTC3617 in an applica-
tion with the following specifications:
VIN = 2.5V, VOUT = 1.25V, IOUT(MAX) = 6A, IOUT(MIN) =
200mA, f = 2.6MHz.
First, calculate the timing resistor:
RT =
3.8211Hz
2.6MHz
– 16k
= 130k
Next, calculate the inductor value for about 33% ripple
current at maximum VIN:
L
=
1.25V
2.6MHz 2A
1–
1.25V
2.5V
= 0.12H
Using a standard value of 0.1H inductor results in a
maximum ripple current of:
IL =
1.25V
2.6MHz 0.1H
1–
1.25V
2.5V
= 2.4A
COUT will be selected based on the ESR that is required
to satisfy the output voltage ripple requirement and the
bulk capacitance needed for loop stability. For this design,
a 100F ceramic capacitor is used with a X5R or X7R
dielectric.
CIN should be selected for a maximum current rating of:
IRMS = 6A
1.25V
2.5V
2.5V
1.25V
– 1
= 3ARMS
Decoupling PVIN with four 10F to 22F capacitors is
adequate for most applications. Connecting the VFB pin
directlytoVOUTwillsettheoutputvoltageequaltoone-half
of the voltage on the VDDQIN pin. The complete circuit of
this design example is illustrated in Figure 1.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3617:
1. Agroundplaneisrecommended.Ifagroundplanelayer
is not used, the signal and power grounds should be
segregated with all small-signal components returning
to the SGND pin at one point which is then connected
to the PGND pin close to the LTC3617.
2. Connect the (+) terminal of the input capacitor(s), CIN,
as close as possible to the PVIN pin, and the (–) terminal
as close as possible to the exposed pad, PGND. This
capacitorprovidestheACcurrentintotheinternalpower
MOSFETs.
3. Keep the switching node, SW, away from all sensitive
small-signal nodes.
4. Flood all unused areas on all layers with copper. Flood-
ing with copper will reduce the temperature rise of
power components. Connect the copper areas to PGND
(exposed pad) for best performance.
5. Connect the VFB pin directly to VOUT.
applications inForMation
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