參數(shù)資料
型號(hào): LTC3617EUDD#PBF
廠商: LINEAR TECHNOLOGY CORP
元件分類(lèi): 穩(wěn)壓器
英文描述: 14 A SWITCHING REGULATOR, 2700 kHz SWITCHING FREQ-MAX, PQCC24
封裝: 3 X 5 MM, LEAD FREE, PLASTIC, QFN-24
文件頁(yè)數(shù): 7/20頁(yè)
文件大?。?/td> 471K
代理商: LTC3617EUDD#PBF
LTC3617
15
3617fa
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of
the losses: VIN quiescent current and I2R losses. The VIN
quiescent current loss dominates the efficiency loss at
very low load currents whereas the I2R loss dominates
the efficiency loss at medium to high load currents. In a
typical efficiency plot, the efficiency curve at very low load
currents can be misleading since the actual power lost is
usually of no consequence.
1. TheVINquiescentcurrentisduetotwocomponents:the
DC bias current as given in the Electrical Characteristics
and the internal main switch and synchronous switch
gate charge currents. The gate charge current results
fromswitchingthegatecapacitanceoftheinternalpower
MOSFET switches. Each time the gate is switched from
low to high to low again, a packet of charge dQ moves
from VIN to ground. The resulting dQ/dt is the current
into VIN due to gate charge, and it is typically larger than
the DC bias current. Both the DC bias and gate charge
losses are proportional to VIN; thus, their effects will
be more pronounced at higher supply voltages.
2. I2R losses are calculated from the resistances of the
internal switches, RSW, and external inductor, RL. In
continuous mode the average output current flowing
through inductor L is “chopped” between the main
switch and the synchronous switch. Thus, the series
resistance looking into the SW pin is a function of both
top and bottom MOSFET RDS(ON) and the duty cycle
(DC) as follows:
RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC)
The RDS(ON) for both the top and bottom MOSFETs can
be obtained from the Typical Performance Character-
istics curves. To obtain I2R losses, simply add RSW to
RL and multiply the result by the square of the average
output current.
Other losses including CIN and COUT ESR dissipative
losses and inductor core losses generally account for
less than 2% of the total loss.
Thermal Considerations
Inmostapplications,theLTC3617doesnotgeneratemuch
heat due to its high efficiency.
applications inForMation
However, in high current applications where the LTC3617
is running at high ambient temperature with low supply
voltage and high duty cycles, such as in dropout, the heat
generatedmayexceedthemaximumjunctiontemperature
of the part. If the junction temperature reaches approxi-
mately 160°C, both power switches will be turned off and
the SW node will become high impedance.
To prevent the LTC3617 from exceeding the maximum
junction temperature, some thermal analysis is required.
The temperature rise is given by:
TRISE = (PD) (θJA)
where PD is the power dissipated by the regulator and θJA
is the thermal resistance from the junction of the die to
the ambient temperature. The junction temperature, TJ,
is given by:
TJ = TA + TRISE
where TA is the ambient temperature.
As an example, consider the case when the LTC3617 is
used in a DDR application where VIN = 3.3V, IOUT = 6A,
f = 1MHz, VOUT = 1.25V. The equivalent power MOSFET
resistance RSW is:
RSW =RDS(ON)TOP
VOUT
VIN
+RDS(ON)BOT 1–
VOUT
VIN
= 35m
1.25
3.3
+ 25m 1–
1.25
3.3
= 28.79m
The VIN current during 1MHz with no load is about 22mA,
which includes switching and internal biasing current
loss, transition loss, inductor core loss and other losses
in the application. Therefore, the total power dissipated
by the part is:
PD = IOUT2 RSW + VIN IVIN (No Load)
= 36A2 28.79mΩ + 3.3V 22mA = 1.11W
TheQFN3mm
×5mmpackagejunction-to-ambientthermal
resistance,
θJA, is around 43°C/W. Therefore, the junction
temperature of the regulator operating in a 25°C ambient
temperature is approximately:
TJ = 1.11W 43°C/W + 25°C = 73°C
相關(guān)PDF資料
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