參數(shù)資料
型號(hào): LTC3569IUD#PBF
廠商: LINEAR TECHNOLOGY CORP
元件分類(lèi): 穩(wěn)壓器
英文描述: 2.5 A SWITCHING REGULATOR, 3000 kHz SWITCHING FREQ-MAX, PQCC20
封裝: 3 X 3 MM, LEAD FREE, PLASTIC, QFN-20
文件頁(yè)數(shù): 2/26頁(yè)
文件大小: 468K
代理商: LTC3569IUD#PBF
LTC3569
10
3569fd
OPERATION
Introduction
The LTC3569 contains three constant-frequency, current
mode buck DC/DC regulators. Both the P-channel and
synchronous rectifier (N-channel) switches are internal
to each buck. The operating frequency is determined by
the value of the RT resistor, or is fixed to 2.25MHz by pull-
ing the RT pin to SVIN, or is synchronized to an external
oscillator tied to the MODE pin. Users may select pulse-
skipping or Burst Mode operation to trade off output ripple
forefficiency.Independentprogrammablereferencelevels
allow the LTC3569 to suit a variety of applications.
The LTC3569 offers different power levels, a single 1.2A
buck as well as two 600mA bucks. These three bucks
may be configured in different parallel configurations,
for versatile high current operation. The power stage of
buck 2 can be configured as a slave to buck 1, by pulling
FB2 to SVIN. The power stage of buck 3, can be configured
to be a slave to buck 2, by pulling the FB3 pin to SVIN. To
enable the slave power stage, pull the respective EN pin
high. However if the master is disabled, the slave power
stage is Hi-Z.
Each of the buck regulators supports 100% duty cycle
operation (low dropout mode) when their input voltage
drops very close to their output voltage. The switching
regulators also include soft-start to limit inrush current
when powering on, and short-circuit current protection.
Main Control Loop
During normal operation, the top power switch (P-chan-
nel MOSFET) is turned on at the beginning of a clock
cycle. The P-channel current ramps up as the inductor
charges. The peak inductor current is controlled by the
internally compensated error amplifier output, ITH. The
current comparator (PCOMP) turns off the P-channel and
turns on the N-channel synchronous rectifier when the
inductor current reaches the ITH level minus the offset of
the slope compensation ramp. The energy stored in the
inductor continues to flow through the bottom switch
(N-channel) and into the load until either the inductor
current approaches zero, or the next clock cycle begins.
If the inductor current approaches zero the N comparator
Figure 2. Buck Block Diagram
3569 F02
+
+
ILIM
NCOMP
SWITCHING
LOGIC,
BLANKING,
ANTI SHOOT-THRU
S
Q
R
P-LATCH
CLK
+
SLOPE
PVIN
P-CHANNEL
N-CHANNEL
SW
PGND
ON
SLAVE
PON
NOFF
FROM MASTER
SLEEP
BURST
CLAMP
MODE
ITH
EA
SOFT
START
SLAVE
SD
ON
VREF
VFB
SVIN
EA
SLAVE
VREF
PGOOD
NOR
NAND
GATE
NOR
P COMP
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