
10
LTC3406-1.2
340612fa
APPLICATIO S I FOR ATIO
WU
UU
The regulator loop then acts to return VOUT to its steady-
state value. During this recovery time VOUT can be moni-
tored for overshoot or ringing that would indicate a stability
problem. For a detailed explanation of switching control
loop theory, see Application Note 76.
A second, more severe transient is caused by switching in
loads with large (>1
F) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with COUT, causing a rapid drop in VOUT. No regulator can
deliver enough current to prevent this problem if the load
switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
the load rise time is limited to approximately (25 CLOAD).
Thus, a 10
F capacitor charging to 3.3V would require a
250
s rise time, limiting the charging current to about
130mA.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3406-1.2. These items are also illustrated graphically
in Figures 3 and 4. Check the following in your layout:
1. The power traces, consisting of the GND trace, the SW
trace and the VIN trace should be kept short, direct and
wide.
2. Does the (+) plate of CIN connect to VIN as closely as
possible? This capacitor provides the AC current to the
internal power MOSFETs.
3. Keep the (–) plates of CIN and COUT as close as possible.
Design Example
As a design example, assume the LTC3406-1.2 is used in
a single lithium-ion battery-powered cellular phone
application. The VIN will be operating from a maximum of
4.2V down to about 2.7V. The load current requirement
is a maximum of 0.6A but most of the time it will be in
standby mode, requiring only 2mA. Efficiency at both low
and high load currents is important. With this informa-
tion we can calculate L using equation (1),
L
fI
V
LIN
= () ()
1
12
1
12
.
(3)
Substituting VIN = 4.2V, IL = 240mA and f = 1.5MHz in
equation (3) gives:
L
V
MHz
mA
V
H
=
=
12
1 5
240
1
12
42
238
.
.(
)
.
A 2.2
H inductor works well for this application. For best
efficiency choose a 720mA or greater inductor with less
than 0.2
series resistance.
CIN will require an RMS current rating of at least 0.3A
ILOAD(MAX)/2 at temperature and COUT will require an ESR
of less than 0.25
. In most cases, a ceramic capacitor will
satisfy this requirement.
RUN
LTC3406-1.2
GND
SW
L1
BOLD LINES INDICATE HIGH CURRENT PATHS
VIN
VOUT
340612 F03
4
5
1
3
+
–
2
VOUT
VIN
CIN
COUT
Figure 3. LTC3406-1.2 Layout Diagram
LTC3406-1.2
GND
340612 F04
PIN 1
VOUT
VIN
SW
VIA TO VIN
VIA TO VOUT
COUT
CIN
L1
Figure 4. LTC3406-1.2 Suggested Layout