參數(shù)資料
型號(hào)： LTC2413IGN
廠商： Linear Technology
文件頁(yè)數(shù)： 22/44頁(yè)
文件大?。?/td> 0K
描述： IC A/D CONV 24BIT MICRPWR 16SSOP
標(biāo)準(zhǔn)包裝： 100
位數(shù)： 24
采樣率（每秒）： 6.8
數(shù)據(jù)接口： MICROWIRE?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 2
功率耗散（最大）： 1mW
電壓電源： 單電源
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 16-SSOP（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 16-SSOP
包裝： 管件
輸入數(shù)目和類(lèi)型： 1 個(gè)差分，雙極
LTC2413
29
sn2413 2413fs
APPLICATIO S I FOR ATIO
WU
U
Output Data Rate
When using its internal oscillator, the LTC2413 can pro-
duce up to 6.8 readings per second. The actual output data
rate will depend upon the length of the sleep and data
output phases which are controlled by the user and which
can be made insignificantly short. When operated with an
external conversion clock (FO connected to an external
oscillator), the LTC2413 output data rate can be increased
as desired. The duration of the conversion phase is 20510/
fEOSC. If fEOSC = 139800Hz, the converter behaves as if the
internal oscillator is used with simultaneous 50Hz/60Hz
rejection. There is no significant difference in the LTC2413
performance between these two operation modes.
An increase in fEOSC over the nominal 139800Hz will
translate into a proportional increase in the maximum
output data rate. This substantial advantage is neverthe-
less accompanied by three potential effects, which must
be carefully considered.
First, a change in fEOSC will result in a proportional change
in the internal notch position and in a reduction of the
converter differential mode rejection at the power-line
frequency. In many applications, the subsequent perfor-
mance degradation can be substantially reduced by rely-
ing upon the LTC2413’s exceptional common mode rejec-
tion and by carefully eliminating common mode to differ-
ential mode conversion sources in the input circuit. The
user should avoid single-ended input filters and should
maintain a very high degree of matching and symmetry in
the circuits driving the IN+ and IN– pins.
Second, the increase in clock frequency will increase
proportionally the amount of sampling charge transferred
through the input and the reference pins. If large external
input and/or reference capacitors (CIN, CREF) are used, the
previous section provides formulae for evaluating the
effect of the source resistance upon the converter perfor-
mance for any value of fEOSC. If small external input and/
or reference capacitors (CIN, CREF) are used, the effect of
the external source resistance upon the LTC2413 typical
performance can be inferred from Figures 18, 19, 23 and
24 in which the horizontal axis is scaled by 139800/fEOSC.
Figure 27. INL vs Differential Input Voltage (VIN = IN+ – IN–)
and Reference Source Resistance (RSOURCE at REF+ and REF– for
Large CREF Values (CREF ≥ 1F)
VINDIF/VREFDIF
–0.5 –0.4–0.3–0.2–0.1 0
0.1 0.2 0.3 0.4 0.5
INL
(ppm
OF
V
REF
)
15
12
9
6
3
0
–3
–6
–9
–12
–15
VCC = 5V
REF+ = 5V
REF– = GND
VINCM = 0.5 (IN
+ + IN–) = 2.5V
FO = GND
CREF = 10F
TA = 25°C
RSOURCE = 1000
2413 F27
RSOURCE = 100
RSOURCE = 500
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