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參數(shù)資料
| 型號： | LTC2309IUF#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 22/26頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT SAR 24-QFN |
| 標準包裝： | 91 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 14k |
| 數(shù)據(jù)接口： | I²C，串行 |
| 轉換器數(shù)目： | 1 |
| 功率耗散（最大）： | 15mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-WFQFN 裸露焊盤 |
| 供應商設備封裝： | 24-QFN 裸露焊盤（4x4） |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 8 個單端，單極；8 個單端，雙極；4 個差分，單極；4 個差分，雙極 |
| 產品目錄頁面： | 1349 (CN2011-ZH PDF) |
| 配用： | DC1337A-ND - BOARD SAR ADC LTC2309 |
LTC2309
2309fd
I2C tIMInG CHARACteRIstICs The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Note 4)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
fSCL
SCLClockFrequency
l
400
kHz
tHD(SDA) HoldTime(Repeated)STARTCondition
l
0.6
s
tLOW
LOWPeriodoftheSCLPin
l
1.3
s
tHIGH
HIGHPeriodoftheSCLPin
l
0.6
s
tSU(STA)
Set-UpTimeforaRepeatedSTARTCondition
l
0.6
s
tHD(DAT) DataHoldTime
l
0
0.9
s
tSU(DAT) DataSet-UpTime
l
100
ns
tr
RiseTimeforSDA/SCLSignals
(Note12)
l
20+0.1CB
300
ns
tf
FallTimeforSDA/SCLSignals
(Note12)
l
20+0.1CB
300
ns
tSU(STO) Set-UpTimeforSTOPCondition
l
0.6
s
tBUF
BusFreeTimeBetweenaSTOPandSTARTCondition
l
1.3
s
ADC tIMInG CHARACteRIstICs The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Note 4)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
fSMPL
ThroughputRate(SuccessiveReads)
l
14
ksps
tCONV
ConversionTime
(Note9)
l
1.3
1.8
s
tACQ
AcquisitionTime
(Note9)
l
240
ns
tREFWAKE REFCOMPWake-UpTime(Note13)
CREFCOMP=10F,CREF=2.2F
200
ms
Note 1:StressesbeyondthoselistedunderAbsoluteMaximumRatings
maycausepermanentdamagetothedevice.ExposuretoanyAbsolute
MaximumRatingconditionforextendedperiodsmayaffectdevice
reliabilityandlifetime.
Note 2:Allvoltagevaluesarewithrespecttoground.
Note 3:WhenthesepinvoltagesaretakenbelowgroundoraboveVDD,
theywillbeclampedbyinternaldiodes.Theseproductscanhandleinput
currentsgreaterthan100mAbelowgroundoraboveVDDwithoutlatchup.
Note 4:VDD=5V,fSMPL=14kspsinternalreferenceunlessotherwise
noted.
Note 5:Linearity,offsetandfull-scalespecificationsapplyfora
single-endedanaloginputwithrespecttoCOM.
Note 6:Integralnonlinearityisdefinedasthedeviationofacodefroma
straightlinepassingthroughtheactualendpointsofthetransfercurve.
Thedeviationismeasuredfromthecenterofthequantizationband.
Note 7:Bipolarzeroerroristheoffsetvoltagemeasuredfrom–0.5LSB
whentheoutputcodeflickersbetween000000000000and11111111
1111.Unipolarzeroerroristheoffsetvoltagemeasuredfrom+0.5LSB
whentheoutputcodeflickersbetween000000000000and00000000
0001.
Note 8:Full-scalebipolarerroristheworst-caseof–FSor+FSuntrimmed
deviationfromidealfirstandlastcodetransitionsandincludestheeffect
ofoffseterror.Unipolarfull-scaleerroristhedeviationofthelastcode
transitionfromidealandincludestheeffectofoffseterror.
Note 9:Guaranteedbydesign,notsubjecttotest.
Note 10:AllspecificationsindBarereferredtoafull-scale±2.048Vinput
witha2.5Vreferencevoltage.
Note 11:Fulllinearbandwidthisdefinedasthefull-scaleinputfrequency
atwhichtheSINADdegradesto60dBor10bitsofaccuracy.
Note 12:CB=capacitanceofonebuslineinpF(10pF≤CB≤400pF).
Note 13:REFCOMPwake-uptimeisthetimerequiredfortheREFCOMP
pintosettlewithin0.5LSBat12-bitresolutionofitsfinalvalueafter
wakingupfromSLEEPmode.
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