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參數(shù)資料
| 型號： | LTC1753 |
| 廠商： | Linear Technology Corporation |
| 英文描述： | 9-Bit D-Type Transparent Read-Back Latches With 3-State Outputs 24-PDIP 0 to 70 |
| 中文描述： | 5位可編程同步開關穩(wěn)壓器控制器的奔騰III處理器 |
| 文件頁數(shù)： | 10/24頁 |
| 文件大?。?/td> | 269K |
| 代理商： | LTC1753 |
10
LTC1753
FUU
Table 1. PWRGD and FAULT Logic
INPUT
OUTEN
0
1
1
Table 2. Rated Output Voltage (cont)
INPUT PIN
V
ID4
V
ID3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
0
1
0
1
0
1
0
1
0
0
1
0
* With external pull-up resistor
** With respect to the output voltage selected in Table 2
X Don’t care
RATED OUTPUT
VOLTAGE (V)
V
ID2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
V
ID1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
V
ID0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1.90
1.95
2.00
2.05
SHDN
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
3.0
3.1
3.2
3.3
3.4
3.5
Table 2. Rated Output Voltage
INPUT PIN
V
ID2
1
1
1
1
0
0
0
0
1
1
1
1
RATED OUTPUT
VOLTAGE (V)
1.30
1.35
1.40
1.45
1.50
1.55
1.60
1.65
1.70
1.75
1.80
1.85
V
ID4
0
0
0
0
0
0
0
0
0
0
0
0
V
ID3
1
1
1
1
1
1
1
1
0
0
0
0
V
ID1
1
1
0
0
1
1
0
0
1
1
0
0
V
ID0
1
0
1
0
1
0
1
0
1
0
1
0
OUTPUT*
V
SENSE
**
X
< 97%
> 97%
< 103%
>103%
> 113%
FAULT
1
1
1
PWRGD
0
0
1
1
1
1
0
0
0
OVERVIEW
The LTC1753 is a voltage feedback, synchronous switch-
ing regulator controller (see Block Diagram) designed for
use in high power, low voltage step-down (buck) convert-
ers. It includes an on-chip DAC to control the output
voltage, a PWM generator, a precision reference trimmed
to
±
1%, two high power MOSFET gate drivers and all the
necessary feedback and control circuitry to form a com-
plete switching regulator circuit.
The LTC1753 includes a current limit sensing circuit that
uses the upper external power MOSFET as a current
sensing element, eliminating the need for an external
sense resistor. Once the current comparator, CC, detects
an overcurrent condition, the duty cycle is reduced by
discharging the soft-start capacitor through a voltage-
controlled current source. Under severe overloads or
output short circuit conditions, the chip will be repeatedly
forced into soft-start until the short is removed, prevent-
ing the external components from being damaged. Under
output overvoltage conditions, the MOSFET drivers will be
disabled permanently until the chip power supply is
recycled or the OUTEN pin is toggled.
OUTEN can optionally be connected to an external nega-
tive temperature coefficient (NTC) thermistor placed near
the external MOSFETs or the microprocessor. Two thresh-
old levels are provided internally. When OUTEN drops to
1.7V, the G1 and G2 pins will be forced low. If OUTEN is
pulled below 1.2V, the LTC1753 will go into shutdown
mode, cutting the supply current to a minimum. If thermal
shutdown is not required, OUTEN can be connected to a
APPLICATIOU
W
U
U
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