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參數(shù)資料
| 型號(hào)： | LTC1428CS8-50#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 6/8頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC D/A CONV 8BIT SINK OUT 8-SOIC |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 位數(shù)： | 8 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 120µW |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 1 電流，單極 |
| 采樣率（每秒）： | * |
6
LTC1428-50
SERIAL I/O OPERATI G SEQUE CE
U
Figure 1. 3-Wire Interface Timing Specification
APPLICATIONS INFORMATION
WU
U
8-BIT CURRENT OUTPUT DAC
The LTC1428-50 is an 8-bit, current sink output digital-to-
analog (DAC) converter. The LTC1428-50 is guaranteed
monotonic and is digitally adjustable in 256 equal steps.
Upon power up, the counter resets to 1000000B and the
DAC output assumes midrange. The IOUT pin can be biased
from 2V to 10V. The LTC1428-50 features a full-scale
output current of 50
A ±3% at room temperature (±5%
over temperature). This device also includes a flexible
serial digital interface that allows easy interconnection to
a variety of digital systems.
DIGITAL INTERFACE
Automatic Mode Selection
The LTC1428-50 includes a serial interface capable of com-
municating with the host system using one of three pro-
tocols; standard 3-wire mode, a 2-wire up/down pulse mode
and a 1-wire increment-only pulse mode. The LTC1428-50
is designed to autoconfigure itself depending on the method
of data presentation. A diagram illustrating this
autodetection behavior is shown in Figure 2. At power-up,
the interface is set to 1-wire pulse mode. If the CS line ever
goes low (as it will at the beginning of a valid 3-wire serial
transfer) the chip immediately reconfigures itself into 3-wire
mode and remains in this mode until power is cycled. If CS
stays high, the device stays in pulse mode and monitors the
UP/DN pin to determine whether to switch to 2-wire mode.
If UP/DN ever goes low (as it will the first time a “down”
command is given) the chip switches into 2-wire pulse
mode and remains in this mode until power is cycled. In a
properly configured 1-wire system, CS and UP/DN will
always remain high. 2-wire pulse mode systems must
provide a single logic low pulse before the first data pulses
are sent to prevent the LTC1428-50 from remaining in
1-wire mode if the first several pulses are logic high.
Standard 3-Wire Mode (Figure 3)
Refer to the Serial Interface Operating Sequence in Figure
1. When operating in 3-wire mode, the LTC1428-50 will
interface directly with most standard 3- or 4-wire serial
interface systems. The clock (CLK) input synchronizes the
data transfer with each input bit captured at the rising edge
of CLK and each output data bit shifted through DOUT at the
falling edge. Data is shifted into and out of the LTC1428-
50 starting with the MSB bit. A falling edge at CS initiates
the data transfer and brings the DOUT pin out of three-state.
The serial 8-bit data representing the new DAC setting is
shifted into the DIN pin. Simultaneously, the previous DAC
setting is shifted out of the DOUT pin. After the new data is
DIN
CLK
CS
D7
D6
D5
D4
D3
D2
D1
D0
Hi-Z
D7
′
D6
′
D5
′
D4
′
D3
′
D2
′
D1
′
D0
′
D7
tDZ
Hi-Z
1428-50 F01
DOUT
tDO
tCKHI
tDH
tDS
tCSS
tCKS
tCSLO
tDV
tCKLO
CSH
tCSHI
tCKH
Figure 2. LTC1428-50 Operating Modes
POWER-UP
3-WIRE MODE
PULSE MODE
1428-50 F02
INCREMENT/
DECREMENT
INCREMENT-
ONLY
CS STAYS
HIGH
CS GOES
LOW
DIN (UP/DN)
GOES LOW
DIN STAYS
HIGH
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