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參數資料
| 型號： | LTC1402 |
| 廠商： | Linear Technology Corporation |
| 英文描述： | Serial 12-Bit, 2.2Msps Sampling ADC with Shutdown(串行12位，2.2Msps 采樣模數轉換器(帶關斷)) |
| 中文描述： | 串行12位，2.2Msps采樣ADC（串行12位，2.2Msps采樣模數轉換器（帶關斷）與關斷） |
| 文件頁數： | 14/24頁 |
| 文件大?。?/td> | 280K |
| 代理商： | LTC1402 |
14
LTC1402
Adjustment in Bipolar Mode with Pin 8 Held High
The code transitions occur midway between successive
integer LSB values (i.e., –FS + 0.5LSB, –FS + 1.5LSB, –FS
+ 2.5LSB,...FS – 2.5LSB, FS – 1.5LSB). The output at D
OUT
is two’s complement binary with 1LSB = FS – (–FS)/4096
= 4.096V/4096 = 1.0mV. In applications where absolute
accuracy is important, offset and full-scale errors can be
adjusted to zero. Offset error must be adjusted before full-
scale error. In Figure 10b, zero offset is achieved by
adjusting the offset applied to the A
IN–
input. For zero
offset error, apply –0.5mV (i.e., –0.5LSB) to A
IN+
and
adjust the offset at the A
IN–
input using R8 until the output
code flickers between 0000 0000 0000 and 1111 1111
1111. For full-scale adjustment in Figures 10a and 10b,
apply an input voltage of 2.0465V (FS – 1.5LSB) to A
IN+
and adjust R5 until the output code flickers between 0111
1111 1110 and 0111 1111 1111.
APPLICATIO
S I
N
FOR
ATIO
U
more than 0.25 inch long to the common reference. You
may also choose to tie AGND2 (Pin 6) directly to a solid
analog ground plane and eliminate all the 10
μ
F capacitors
at this pin. The external reference source needs to have
enough output drive current for the 2k
load at each ADC.
W
U
FULL-SCALE AND OFFSET ADJUSTMENT
Figure 9 shows the ideal input/output characteristics for
the LTC1402 in bipolar mode and unipolar mode. Figure
10a shows the components required for full-scale error
adjustment. Figure 10b includes the components for off-
set and full-scale adjustment.
Figure 9. LTC1402 Transfer Characteristic
Figure 10a. Full-Scale Adjustment Circuit with
±
10LSB Range
Figure 10b. Offset and Full-Scale Adjustment
Circuits with
±
10LSB Range
Adjustment in Unipolar Mode with Pin 8 Held Low
The code transitions occur midway between successive
integer LSB values (i.e., –FS + 0.5LSB, –FS + 1.5LSB,
–FS + 2.5LSB,...FS – 2.5LSB, FS – 1.5LSB). The output at
D
OUT
is binary with 1LSB = FS/4096 = 4.096V/4096 =
1.0mV. In applications where absolute accuracy is impor-
tant, offset and full-scale errors can be adjusted to zero.
Offset error must be adjusted before full-scale error. In
Figure 10b, zero offset is achieved by adjusting the offset
applied to the A
IN–
input. For zero offset error apply
–0.5mV (i.e., –0.5LSB) to A
IN+
and adjust the offset at the
A
IN–
input using R8 until the output code flickers between
INPUT VOLTAGE (V)
011...111
011...110
011...101
100...000
100...001
100...010
111...111
111...110
111...101
000...000
000...001
000...010
FS – 1LSB
–(FS – 1LSB)
64k
R1
51
R3
51
64k
REFERENCE
AMP
S/H
10
μ
F
R4
470k
R2
24k
R7
7.5k
R5
500
GAIN
V
REF
5
5V
5V
ANALOG INPUT
0V TO 4.096V
OR
±
2.048V
OFFSET
ADJ
FULL-SCALE
ADJ
7
A
IN–
4
A
IN+
3
AGND2
6
LTC1402
2.048V
1402 F010b
R8
10k
R6
24k
BANGAP
REFERENCE
64k
R1
51
R3
51
64k
10
μ
F
R4
470k
R2
39k
R5
500
GAIN
V
REF
5
ANALOG INPUT
0V TO 4.096V
OR
±
2.048V
7
A
IN–
4
A
IN+
3
AGND2
6
LTC1402
2.048V
1402 F010a
BANGAP
REFERENCE
REFERENCE
AMP
S/H
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