參數(shù)資料
型號： LTC1294
廠商： Linear Technology Corporation
英文描述： Single Chip 12-Bit Data Acquisition System(單片，12位數(shù)據(jù)采集系統(tǒng))
中文描述： 單芯片12位數(shù)據(jù)采集系統(tǒng)（單片，12位數(shù)據(jù)采集系統(tǒng)）
文件頁數(shù)： 7/28頁
文件大?。?/td> 403K
代理商： LTC1294
7
LTC1293/LTC1294/LTC1296
PI FUU
U
#
PIN
FUNCTION
DESCRIPTION
1 – 6
7
CH0 – CH5
COM
Analog Inputs
Common
The analog inputs must be free of noise with respect to AGND.
The common pin defines the zero reference point for all single ended inputs. It must be free of noise and is
usually tied to the analog ground plane.
This is the ground for the internal logic. Tie to the ground plane.
Tie V
–
to most negative potential in the circuit (Ground in single supply applications).
AGND should be tied directly to the analog ground plane.
The reference inputs must be kept free of noise with respect to AGND.
The A/D configuration word is shifted into this input.
The A/D conversion result is shifted out of this output.
A logic low on this input enables data transfer.
This clock synchronizes the serial data transfer and controls A/D conversion rate.
This supply must be kept free of noise and ripple by bypassing directly to the analog ground plane.
8
9
10
11
12
13
14
15
16
DGND
V
–
AGND
V
REF
D
IN
D
OUT
CS
CLK
V
CC
Digital Ground
Negative Supply
Analog Ground
Ref. Input
Data Input
Digital Data Output
Chip Select Input
Clock
Positive supply
LTC1293
#
PIN
FUNCTION
DESCRIPTION
1 –8
9
CH0 – CH7
COM
Analog Inputs
Common
The analog inputs must be free of noise with respect to AGND.
The common pin defines the zero reference point for all single ended inputs. It must be free of noise and is
usually tied to the analog ground plane.
This is the ground for the internal logic. Tie to the ground plane.
Tie V
–
to most negative potential in the circuit (Ground in single supply applications).
AGND should be tied directly to the analog ground plane.
The reference inputs must be kept free of noise with respect to AGND. The A/D sees a reference voltage equal
to the difference between REF
+
and REF
–
.
The A/D configuration word is shifted into this input.
The A/D conversion result is shifted out of this output.
A logic low on this input enables data transfer.
This clock synchronizes the serial data transfer and controls A/D converion rate.
These supplies must be kept free of noise and ripple by bypassing directly to the analog ground plane. AV
CC
and DV
CC
must be tied together.
10
11
12
13, 14 REF
–
, REF
+
DGND
V
–
AGND
Digital Ground
Negative Supply
Analog Ground
Ref. Inputs
15
16
17
18
19, 20 AV
CC,
DV
CC
D
IN
D
OUT
CS
CLK
Data Input
Digital Data Output
Chip Select Input
Clock
Positive Supplies
LTC1294
#
PIN
FUNCTION
DESCRIPTION
1 –8
9
CH0 – CH7
COM
Analog Inputs
Common
The analog inputs must be free of noise with respect to AGND.
The common pin defines the zero reference point for all single ended inputs. It must be free of noise and is
usually tied to the analog ground plane.
This is the ground for the internal logic. Tie to the ground plane.
Tie V
–
to most negative potential in the circuit (Ground in single supply applications).
AGND should be tied directly to the analog ground plane.
The reference inputs must be kept free of noise with respect to AGND. The A/D sees a reference voltage equal
to the difference between REF
+
and REF
–
.
The A/D configuration word is shifted into this input.
The A/D conversion result is shifted out of this output.
A logic low on this input enables data transfer.
This clock synchronizes the serial data transfer and controls A/D conversion rate.
System Shutdown Output pin will go low when power shutdown is requested.
10
11
12
13, 14 REF
–
, REF
+
DGND
V
–
AGND
Digital Ground
Negative Supply
Analog Ground
Ref. Inputs
15
16
17
18
19
D
IN
D
OUT
CS
CLK
SSO
Data Input
Digital Data Output
Chip Select Input
Clock
System Shutdown
Output
Positive Supply
20
V
CC
This supply must be kept free of noise and ripple by bypassing directly to the analog ground plane.
LTC1296
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