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參數(shù)資料
| 型號： | LTC1264CSW |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 運動控制電子 |
| 英文描述： | High Speed, Quad Universal Filter Building Block |
| 中文描述： | QUAD SWITCHED CAPACITOR FILTER, BUTTERWORTH/CHEBYSHEV, UNIVERSAL, PDSO24 |
| 封裝： | 0.300 INCH, PLASTIC, SOP-24 |
| 文件頁數(shù)： | 12/16頁 |
| 文件大?。?/td> | 227K |
| 代理商： | LTC1264CSW |
12
LTC1264
1264fb
U
S
A
O
PPLICATI
IU
U
first stage and decreasing the R1 resistor of the last stage
by the same amount (multiplying the R1 resistor of the
first stage and dividing the R1 resistor of the last stage by
2 for narrowband filter, and by 5 for wideband filter is a
good rule of thumb). This adjustment may, however,
increase the filter’s passband noise.
Figure 11. Mode 1b Bandpass Filter
Figures 12 and 13 show the gain response graphs of the
40kHz Butterworth bandpass design described above. The
passband gain response graph (Figure 12) shows a 40kHz
gain of –0.4dB and a tilted passband from 37kHz to 43kHz.
These errors are due to the 1% resistors used and the side-
to-side matching of the LTC1264 f
CLK
-to-f
CENTER
ratio
which typically is 0.4%. To adjust for 0dB gain at 40kHz,
reduce the value of R1 in the first stage by 5%. To adjust
for a flat passband, adjust by
±
1% the value of R6 in stages
3 and 4. Adjusting R6 compensates for the side-to-side
matching errors. Please refer to Figure 5 equations defin-
ing f
O
and Q as a function of R6.
The sequence of 2nd order stages and the bandpass gain
H
OBP
of each stage will determine the gain peaks at the
filter’s intermediate outputs. A given internal output can
have several dB more gain than the final filter output. Gain
peaks occur around the corners of the passband. The gain
peaks can be reduced by increasing the R1 resistor of the
Figure 12. Passband Gain vs Frequency
40kHz Butterworth Bandpass
FREQUENCY (kHz)
30
G
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
–3.5
–4.0
46
1264 F12
34
38
42
50
32
36
40
44
48
MODE 1b
V
S
=
±
7.5V
f
CLK
= 1MHz
f
CLK
/f
CENTER
= 25:1
Figure 13. Gain vs Frequency
40kHz Butterworth Bandpass
FREQUENCY (kHz)
10
G
10
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
74
1264 F13
26
42
58
90
18
34
50
66
82
MODE 1b
V
S
=
±
7.5V
f
CLK
= 1MHz
f
CLK
/f
CENTER
= 25:1
R1
R2
R1
R2
IN
1264 F11
OUT
INV B
HPB/NB
BPB
LPB
SB
AGND
V
+
SA
LPA
BPA
HPA/NA
INV A
INV C
HPC/NC
BPC
LPC
SC
V
–
CLK
SD
LPD
BPD
HPD/ND
INV D
R3
R3
R1
R2
R2
R3
R1
LTC1264
R5
R6
R6
R5
f
CLK
R3
R5
R6
R6
R5
STAGE 2
STAGE 4
STAGE 3
STAGE 1
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