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參數(shù)資料
| 型號： | LTC1261 |
| 廠商： | Linear Technology Corporation |
| 英文描述： | Switched Capacitor Regulated Voltage Inverter(開關(guān)電容穩(wěn)壓電壓反相器) |
| 中文描述： | 開關(guān)電容穩(wěn)壓逆變器（開關(guān)電容穩(wěn)壓電壓反相器） |
| 文件頁數(shù)： | 8/16頁 |
| 文件大小： | 265K |
| 代理商： | LTC1261 |
8
LTC1261
APPLICATIO
S I
FOR
ATIO
U
OUTPUT RIPPLE
Output ripple in the LTC1261 comes from two sources;
voltage droop at the output capacitor between clocks and
frequency response of the regulation loop. Voltage droop
is easy to calculate. With a typical clock frequency of
550kHz, the charge on the output capacitor is refreshed
once every 1.8
μ
s. With a 15mA load and a 3.3
μ
F output
capacitor, the output will droop by:
C
OUT
)
W
U
U
I
LOAD
×
= 15mA
×
t
)
= 8.2mV
1.8
μ
s
)
3.3
μ
F
)
This can be a significant ripple component when the
output is heavily loaded, especially if the output capacitor
is small. If absolute minimum output ripple is required, a
10
μ
F or greater output capacitor should be used.
Regulation loop frequency response is the other major
contributor to output ripple. The LTC1261 regulates the
output voltage by limiting the amount of charge trans-
ferred to the output capacitor on a cycle-by-cycle basis.
The output voltage is sensed at the ADJ pin (COMP for
fixed output versions) through an internal or external
resistor divider from the OUT pin to ground. As the flying
capacitors are first connected to the output, the output
voltage begins to change quite rapidly. As soon as it
exceeds the set point COMP1 trips, switching the state of
the charge pump and stopping the charge transfer. Be-
cause the RC time constant of the capacitors and the
switches is quite short, the ADJ pin must have a wide AC
bandwidth to be able to respond to the output in time.
External parasitic capacitance at the ADJ pin can reduce
the bandwidth to the point where the comparator cannot
respond by the time the clock pulse finishes. When this
happens the comparator will allow a few complete pulses
through, then overcorrect and disable the charge pump
until the output drops below the set point. Under these
conditions the output will remain in regulation but the
output ripple will increase as the comparator “hunts” for
the correct value.
To prevent this from happening, an external capacitor can
be connected from ADJ (or COMP for fixed output parts)
to ground to compensate for external parasitics and in-
crease the regulation loop bandwidth (Figure 3). This
sounds counterintuitive until we remember that the inter-
nal reference is generated with respect to OUT, not ground.
COMP 1
1.24V
R2
V
OUT
ADJ/COMP
RESISTORS ARE
INTERNAL FOR
FIXED OUTPUT PARTS
LTC1261 F03
R1
C
100pF
TO CHARGE
PUMP
REF
+
–
Figure 3. Regulator Loop Compensation
The feedback loop actually sees ground as its “output,”
thus the compensation capacitor should be connected
across the “top” of the resistor divider, from ADJ (or
COMP) to ground. By the same token, avoid adding
capacitance between ADJ (or COMP) and V
OUT
. This will
slow down the feedback loop and increase output ripple.
A 100pF capacitor from ADJ or COMP to ground will
compensate the loop properly under most conditions.
OUTPUT FILTERING
If extremely low output ripple (<5mV) is required, addi-
tional output filtering is required. Because the LTC1261
uses a high 550kHz switching frequency, fairly low value
RC or LC networks can be used at the output to effectively
filter the output ripple. A 10
series output resistor and a
3.3
μ
F capacitor will cut output ripple to below 3mV (Figure
4). Further reductions can be obtained with larger filter
capacitors or by using an LC output filter.
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| LTC1261CS | 功能描述:IC REG SWITCHED CAP INV 14SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 開關(guān)穩(wěn)壓器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:降壓（降壓） 輸出類型:固定 輸出數(shù):1 輸出電壓:1.2V，1.5V，1.8V，2.5V 輸入電壓:2.7 V ~ 20 V PWM 型:- 頻率 - 開關(guān):- 電流 - 輸出:50mA 同步整流器:是 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:10-TFSOP，10-MSOP（0.118"，3.00mm 寬）裸露焊盤 包裝:帶卷 (TR) 供應(yīng)商設(shè)備封裝:10-MSOP 裸露焊盤 |
| LTC1261CS#PBF | 功能描述:IC REG SWITCHED CAP INV 14SOIC RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 開關(guān)穩(wěn)壓器 系列:- 產(chǎn)品培訓(xùn)模塊:MIC23xxx HyperLight Load™ Regulators 標(biāo)準(zhǔn)包裝:5,000 系列:HyperLight Load® 類型:降壓（降壓） 輸出類型:固定 輸出數(shù):1 輸出電壓:1.8V 輸入電壓:2.7 V ~ 5.5 V PWM 型:混合物 頻率 - 開關(guān):4MHz 電流 - 輸出:2A 同步整流器:是 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-VFDFN 裸露焊盤，8-MLF? 包裝:帶卷 (TR) 供應(yīng)商設(shè)備封裝:8-MLF?（2x2） 產(chǎn)品目錄頁面:1094 (CN2011-ZH PDF) 其它名稱:576-3303-2 |
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