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參數(shù)資料
| 型號： | LTC1090CSW#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 8/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DATA ACQUIS SYS 10BIT 20-SOIC |
| 標(biāo)準(zhǔn)包裝： | 38 |
| 類型： | 數(shù)據(jù)采集系統(tǒng)（DAS），ADC |
| 分辨率（位）： | 10 b |
| 采樣率（每秒）： | 30k |
| 數(shù)據(jù)接口： | 串行 |
| 電壓電源： | 單/雙電源 |
| 電源電壓： | ±5V，5V，10V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-SOIC |
| 包裝： | 管件 |
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LTC1090
1090fc
Motorola SPI (MC68HC05C4)
The MC68HC05C4 transfers data MSB first and in 8-bit
increments. Programming the LTC1090 for MSB first
format and 16-bit word length allows the 10-bit data
output to be received by the MPU as two 8-bit bytes with
the final 6 unused bits filled with zeroes by the LTC1090.
Hardware and Software Interface to Motorola MC68HC05C4
Processor
Hitachi Synchronous SCI (HD63705)
The HD63705 transfers serial data in 8-bit increments,
LSB first. To accommodate this, the LTC1090 is
programmed for 16-bit word length and LSB first format.
The 10-bit output data is received by the processor as two
8-bit bytes, LSB first. The LTC1090 fills the final 6 unused
bits (after the MSB) with zeroes in unipolar mode and with
the sign bit in bipolar mode.
Hardware and Software Interface to Hitachi HD63705 Processor
APPLICATIO S I FOR ATIO
WU
UU
MNEMONIC
DESCRIPTION
BCLR n
C0 is cleared (CS goes Low)
LDA
Load DIN for LTC1090 into ACC
STA
Load DIN from ACC to SPI data reg. Start SCK
↑
NOP
8 NOPs for timing
↓
LDA
Load contents of SPI status reg. into ACC
LDA
Load LTC1090 DOUT from SPI data reg. into ACC (byte 1)
STA
Load LTC1090 DOUT into RAM (location A)
STA
Start next SPl cycle
↑
NOP
6 NOPs for timing
↓
BSET n
C0 is set (CS goes high)
LDA
Load contents of SPI status reg. into ACC
LDA
Load LTC1090 DOUT from SPI data reg. into ACC (byte 2)
STA
Load LTC1090 DOUT into RAM (location A + 1)
LTC1090
ANALOG
INPUTS
DOUT
DOUT from LTC1090 stored in MC68HCO5C4 RAM
DIN
SCLK
CO
SCK
MOSI
MISO
MC68HCO5C4
CS
B9
Location A
Location A + 1
byte 1
byte 2
*B9 is MSB in unipolar or sign bit in bipolar
MSB*
LSB
B8 B7 B6 B5 B4 B3 B2
B1 B0
0
LTC1090 AI12
MNEMONIC
DESCRIPTION
LDA
Load DIN word for LTC1090 into ACC from RAM
BCLR n
C0 cleared (CS goes low)
STA
Load DIN word for LTC1090 into SCI data reg. from ACC
and start clocking data (LSB first)
↑
NOP
6 NOPs for timing
↓
LDA
Load contents of SCI data reg. into ACC (byte 1)
Start next SCI cycle
STA
Load LTC1090 DOUT word into RAM (Location A)
NOP
Timing
BSET n
C0 set (CS goes high)
LDA
Load contents of SCI data reg. into ACC (byte 2)
STA
Load LTC1090 DOUT word into RAM (Location A + 1)
LTC1090
ANALOG
INPUTS
DOUT
DOUT from LTC1090 stored in HD63705 RAM
DIN
SCLK
C0
CK
TX
RX
HD63705
CS
B7
Location A
Location A + 1
Bipolar
Sign
byte 1
byte 2
LSB
B6 B5 B4 B3 B2 B1 B0
B9 B9 B9 B9 B9 B9 B9 B8
LTC1090 AI13
B7
Location A
Location A + 1
Unipolar
byte 1
byte 2
LSB
MSB
B6 B5 B4 B3 B2 B1 B0
00 0
0
0 B9 B8
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