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參數(shù)資料
| 型號(hào)： | LTC1040CSW#TRPBF |
| 廠商： | Linear Technology |
| 文件頁(yè)數(shù)： | 8/12頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC COMPARATOR LOW PWR DUAL18SOIC |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 系列： | LTCMOS™ |
| 類型： | 通用 |
| 元件數(shù)： | 2 |
| 輸出類型： | CMOS，TTL |
| 電壓 - 電源，單路/雙路(±)： | 2.8 V ~ 16 V，±2.8 V ~ 8 V |
| 電壓 - 輸入偏移（最小值）： | 4.5mV @ ±8V |
| 電流 - 輸入偏壓（最小值）： | 300pA @ ±5V |
| 電流 - 靜態(tài)（最大值）： | 3mA |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 18-SOIC（0.295"，7.50mm 寬） |
| 安裝類型： | 表面貼裝 |
| 包裝： | 帶卷 (TR) |
5
LTC1040
1040fa
The LTC1040 uses sampled data techniques to achieve its
unique characteristics. Some of the experience acquired
using classic linear comparators does not apply to this
circuit, so a brief description of internal operation is
essential to proper application.
The most obvious difference between the LTC1040 and
other comparators is the dual differential input structure.
Functionally, when the sum of inputs is positive, the
comparator output is high and when the sum of the inputs
is negative, the output is low. This unique input structure
is achieved with CMOS switches and a precision capacitor
array. Because of the switching nature of the inputs, the
concept of input current and input impedance needs to be
examined.
The equivalent input circuit is shown in Figure 1. Here, the
input is being driven by a resistive source, RS, with a
bypass capacitor, CS. The bypass capacitor may or may
not be needed, depending on the size of the source
resistance and the magnitude of the input voltage, VIN.
APPLICATIO S I FOR ATIO
WU
UU
Figure 1. Equivalent Input Circuit
VIN
RS
CS
LTC1040 AI01
S1
S2
CIN
≈ 33pF
V–
LTC1040 DIFFERENTIAL INPUT
+
–
For RS < 1Ok
Assuming CS is zero, the input capacitor, CIN, charges to
VIN with a time constant of RS CIN. When RS is too large,
CIN does not have a chance to fully charge during the
sampling interval (
≈ 80s) and errors will result. If RS
exceeds 10k
, a bypass capacitor is necessary to mini-
mize errors.
For RS > 1Ok
For RS greater than 10k, CIN cannot fully charge and a
bypass capacitor, CS, is needed. When switch S1 closes,
charge is shared between CS and CIN. The change in
voltage on CS because of this charge sharing is:
V = VIN
CIN
CIN + CS
RIN =
VIN
IIN
=
1
fS CIN
=
1
fS 33pF
This represents an error and can be made arbitrarily small
by increasing CS.
With the addition of CS, a second error term caused by the
finite input resistance of the LTC1040 must be considered.
Switches S1 and S2 alternately open and close, charging
and discharging CIN between VIN and ground. The
alternate charge and discharge of CIN causes a current to
flow into the positive input and out of the negative input.
The magnitude of this current is:
IIN = q fS = VIN CIN fS
where fS is the sampling frequency. Because the input
current is directly proportional to input voltage, the LTC1040
can be said to have an average input resistance of:
Notice that most of the error is caused by RIN. If the
sampling frequency is reduced to 1Hz, the voltage error is
reduced to 66
V.
(see typical curve of Input Resistance vs Sampling Fre-
quency). A voltage divider is set up between RS and RIN
causing error.
The input voltage error caused by these two effects is:
VERROR = VIN
Example: fS = 10Hz, RS = 1M,
CS = 1F, VIN = 1V
()
CIN
CIN + CS
+
RS
RS + RIN
VERROR = 1V
= 33
V + 330V = 363V.
()
33 10–12
106
1 10 –6
106 + 3 109
+
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