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參數(shù)資料
| 型號： | LT6301IFE#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 14/16頁 |
| 文件大小： | 0K |
| 描述： | IC XDSL LINE DRIVER DUAL 28TSSOP |
| 標準包裝： | 2,000 |
| 類型： | 驅(qū)動器 |
| 驅(qū)動器/接收器數(shù)： | 2/0 |
| 規(guī)程： | xDSL |
| 電源電壓： | 5 V ~ 12 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SOIC（0.173"，4.40mm 寬）裸露焊盤 |
| 供應商設備封裝： | 28-TSSOP 裸露焊盤 |
| 包裝： | 帶卷 (TR) |
7
LT6301
sn6301 6301f
APPLICATIO S I FOR ATIO
WU
UU
The LT6301 is a high speed, 200MHz gain bandwidth
product, quad voltage feedback amplifier with high output
current drive capability, 500mA source and sink. The
LT6301 is ideal for use as a line driver in xDSL data
communication applications. The output voltage swing
has been optimized to provide sufficient headroom when
operating from
±12V power supplies in full-rate ADSL
applications. The LT6301 also allows for an adjustment of
the operating current to minimize power consumption. In
addition, the LT6301 is available in a small footprint
surface mount package to minimize PCB area.
To minimize signal distortion, the LT6301 amplifiers are
decompensated to provide very high open-loop gain at
high frequency. As a result each amplifier is frequency
stable with a closed-loop gain of 10 or more. If a closed-
loop gain of less than 10 is desired, external frequency
compensating components can be used.
Setting the Quiescent Operating Current
Power consumption and dissipation are critical concerns
in multiport xDSL applications. Two pins, Shutdown
(SHDN) and Shutdown Reference (SHDNREF), are provided
to control quiescent power consumption and allow for the
complete shutdown of the drivers. The quiescent current
should be set high enough to prevent distortion induced
errors in a particular application, but not so high that power
is wasted in the driver unnecessarily. A good starting point
to evaluate the LT6301 is to set the quiescent current to
10mA per amplifier. Pins 4 and 5 set the current for ampli-
fiers A and B and Pins 10 and 11 set the current for amplifers
C and D. Each amplifier pair should be controlled separately.
The internal biasing circuitry is shown in Figure 1. Ground-
ing the SHDNREF pin and directly driving the SHDN pin with
a voltage can control the operating current as seen in the
Typical Performance Characteristics. When the SHDN pin
is less than SHDNREF + 0.4V, the driver is shut down and
consumes typically only 100
A of supply current and the
outputs are in a high impedance state. Part to part varia-
tions, however, will cause inconsistent control of the qui-
escent current if direct voltage drive of the SHDN pin is used.
Using an external resistor, RBIAS, connected in one of two
ways provides a much more predictable control of the
quiescent supply current. Figure 2 illustrates the effect on
supply current per amplifier with RBIAS connected be-
tween the SHDN pin and the 12V V+ supply of the LT6301
and the approximate design equations. Figure 3 illustrates
the same control with RBIAS connected between the
SHDNREF pin and ground while the SHDN pin is tied to V+.
Either approach is equally effective.
Figure 1. Internal Current Biasing Circuitry
2k
SHDN
SHDNREF
TO
START-UP
CIRCUITRY
1k
6301 F01
IBIAS
TO AMPLIFIERS
BIAS CIRCUITRY
2I
I
2I
5I
2
5
IBIAS =
ISUPPLY PER AMPLIFIER (mA) = 64 IBIAS
ISHDN = ISHDNREF
RBIAS (k)
0
I SUPPLY
PER
AMPLIFIER
(mA)
10
20
30
5
15
25
10
6301 F02
7
40
70
100
130
160
190
VS = ±12V
V+ = 12V
RBIAS
SHDN
SHDNREF
RBIAS =
25.6 – 2k
V+ – 1.2V
IS PER AMPLIFIER (mA)
25.6
V+ – 1.2V
RBIAS + 2k
≈
Figure 2. RBIAS to V+ Current Control
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