參數(shù)資料
型號(hào)： LT3692IUH#PBF
廠商： LINEAR TECHNOLOGY CORP
元件分類(lèi)： 穩(wěn)壓器
英文描述： 5.8 A DUAL SWITCHING CONTROLLER, 2750 kHz SWITCHING FREQ-MAX, PQCC32
封裝： 5 X 5 MM, LEAD FREE, PLASTIC, MO-220WHHD, QFN-32
文件頁(yè)數(shù)： 36/36頁(yè)
文件大?。?/td> 526K
代理商： LT3692IUH#PBF
LT3692
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3692f
PIN FUNCTIONS
SHDN1/2: The shutdown pin is used to control each
channel’s operation. In addition to controlling channel 1,
the SHDN1 pin also activates control circuitry for both
channels and must be present for channel 2 to operate.
When SHDN1 is below its threshold, quiescent current is
reduced to a typical value of 6A. If the shutdown features
are not used, the SHDN pin can be tied to VIN. If SHDN pin
is driven by a logic signal, a series resistor is required.
See Applications Information.
SS1/2: Current flowing out the SS pin into an external
capacitor defines the rise time of the output voltage. When
the SS pin is lower than the 0.8V reference, the feedback
is regulated to the SS voltage. When the SS pin exceeds
the reference voltage, the output will regulate the FB pin
voltage to 0.8V and the SS pin will continue to rise until
its clamp voltage. During an output overload, the VC pin is
driven above the maximum switch current level activating
its voltage clamp. When the VC clamp is activated, the SS
pinisdischargeduntiltheoutputreachesaregulationpoint
that the maximum output current can maintain. When the
overload condition is removed, the output soft starts from
that voltage. In the case of a SHDN or thermal shutdown
event, a power on reset latch ensures the capacitors on
bothchannelsarefullydischargedbeforeeitherisreleased.
Connecting both SS pins together ensures the outputs
track together.
CLKOUT: The CLKOUT pin generates a square wave of 0V
to 2.5V which is synchronized to the internal oscillator. If
the switching frequency is set by an external resistor the
resultant clock duty cycle will be 50%. If the RT/SYNC pin
isdrivenbyanexternalclocksource,theresultantCLKOUT
duty cycle will mirror the external source.
SW1/2: The SW pin is the emitter of the internal power
NPN. At switch off, the inductor will drive this pin below
ground with a high dV/dt. An external Schottky catch
diode to ground, close to the SW pin and respective VIN
decoupling capacitor’s ground, must be used to prevent
this pin from excessive negative voltages.
TJ: The TJ pin outputs a voltage proportional to junction
temperature. The pin is 250mV for 25°C and has a slope
of 10mV/°C. See the Applications Information section for
more information.
VC1/2:TheVCpinistheoutputoftheerroramplifierandthe
input to the peak switch current comparator. It is normally
used for frequency compensation, but can also be used
as a current clamp or control loop override. If the error
amplifier drives VC above the maximum switch current
level, a voltage clamp activates. This indicates that the
output is overloaded and current is pulled from the SS
pin reducing the regulation point.
VIN1: The VIN1 pin powers the internal control circuitry for
bothchannelsandismonitoredbyovervoltage/undervolt-
age lockout comparators. The VIN1 pin is also connected
to the collector of channel 1’s on-chip power NPN switch.
The VIN1 pin has high dI/dt edges and must be decoupled
to ground close to the pin of the device.
VIN2: The VIN2 pin powers the output stage for channel 2
and is monitored by overvoltage/undervoltage lockout
comparators. VIN1 voltage must be greater than 2.8V for
VIN2operation.TheVIN2pinisalsothecollectorofchannel
2’s on-chip power NPN switch. The VIN2 pin has high dI/
dt edges and must be decoupled to ground close to the
pin of the device.
VOUT1/2: The VOUT pin is the output to the internal sense
resistor that measures current flowing in the inductor.
When the current in the resistor exceeds the current dic-
tated by the VC pin, the SW latch is held in reset disabling
the output switch. Bias current flows out of the VOUT pin.
相關(guān)PDF資料
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