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| 型號(hào)： | LT1993IUD-4#PBF |
| 廠商： | Linear Technology |
| 文件頁(yè)數(shù)： | 5/16頁(yè) |
| 文件大小： | 0K |
| 描述： | IC DIFF AMP/ADC DRVR 16-QFN |
| 標(biāo)準(zhǔn)包裝： | 121 |
| 放大器類(lèi)型： | 差分 |
| 電路數(shù)： | 2 |
| 輸出類(lèi)型： | 差分 |
| 轉(zhuǎn)換速率： | 1100 V/µs |
| -3db帶寬： | 900MHz |
| 電流 - 輸入偏壓： | 5µA |
| 電壓 - 輸入偏移： | 1000µV |
| 電流 - 電源： | 100mA |
| 電流 - 輸出 / 通道： | 45mA |
| 電壓 - 電源，單路/雙路(±)： | 4 V ~ 5.5 V，±2 V ~ 2.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 16-WFQFN 裸露焊盤(pán) |
| 供應(yīng)商設(shè)備封裝： | 16-QFN-EP（3x3） |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁(yè)面： | 1322 (CN2011-ZH PDF) |
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LT1993-4
13
19934fa
APPLICATIO S I FOR ATIO
WU
U
To decrease lter bandwidth, add two external capaci-
tors, one from +OUTFILTERED to ground, and the other
from –OUTFILTERED to ground. A single differential
capacitor connected between +OUTFILTERED and –OUT-
FILTERED can also be used, but since it is being driven
differentially it will appear at each ltered output as a
single-ended capacitance of twice the value. To halve the
lter bandwidth, for example, two 36pF capacitors could
be added (one from each ltered output to ground). Al-
ternatively one 18pF capacitor could be added between
the ltered outputs, again halving the lter bandwidth.
Combinations of capacitors could be used as well; a three
capacitor solution of 12pF from each ltered output to
ground plus a 12pF capacitor between the ltered outputs
would also halve the lter bandwidth (Figure 7).
Bandpass ltering is also easily implemented with just a
few external components. An additional 120pF and 39nH,
each added differentially between +OUTFILTERED and
–OUTFILTERED creates a bandpass lter with a 71MHz
center frequency, –3dB points of 55MHz and 87MHz, and
1.6dB of insertion loss (Figure 8).
Figure 6. LT1993-4 Internal Filter Topology Modied for
2x Filter Bandwidth (2 External Resistors)
Output Common Mode Adjustment
The LT1993-4’s output common mode voltage is set by the
VOCM pin. It is a high-impedance input, capable of setting
the output common mode voltage anywhere in a range
from 1.1V to 3.6V. Bandwidth of the VOCM pin is typically
300MHz, so for applications where the VOCM pin is tied to
a DC bias voltage, a 0.1F capacitor at this pin is recom-
mended. For best distortion performance, the voltage at
the VOCM pin should be between 1.8V and 2.6V.
When interfacing with most ADCs, there is generally a VOCM
output pin that is at about half of the supply voltage of the
ADC. For 5V ADCs such as the LTC17XX family, this VOCM
output pin should be connected directly (with the addition
of a 0.1F capacitor) to the input VOCM pin of the LT1993-4.
For 3V ADCs such as the LTC22XX families, the LT1993-
4 will function properly using the 1.65V from the ADC’s
VCM reference pin, but improved Spurious Free Dynamic
Range (SFDR) and distortion performance can be achieved
by level-shifting the LTC22XX’s VCM reference voltage up
to at least 1.8V. This can be accomplished as shown in
Figure 9 by using a resistor divider between the LTC22XX’s
VCMoutput pin and VCC and then bypassing the LT1993-4’s
VOCMpin with a 0.1F capacitor. For a common mode volt-
age above 1.9V, AC coupling capacitors are recommended
between the LT1993-4 and the LTC22XX ADC because of
the input voltage range constraints of the ADC.
Figure 7. LT1993-4 Internal Filter Topology Modied for
1/2x Filter Bandwidth (3 External Capacitors)
VEE
19934 F06
12pF
LT1993-4
–OUT
+OUT
12pF
25
25
12pF
–OUTFILTERED
FILTERED OUTPUT
(350MHz)
+OUTFILTERED
8
7
6
5
VEE
19934 F07
12pF
LT1993-4
–OUT
+OUT
12pF
–OUTFILTERED
+OUTFILTERED
8
7
6
5
FILTERED OUTPUT
(87.5MHz)
25
9
25
9
Figure 8. LT1993-4 Output Filter Topology Modied for Bandpass
Filtering (1 External Inductor, 1 External Capacitor)
VEE
19934 F08
12pF
LT1993-4
–OUT
+OUT
12pF
120pF
39nH
–OUTFILTERED
+OUTFILTERED
8
7
6
5
FILTERED OUTPUT
(71MHz BANDPASS,
–3dB @ 55MHz/87MHz)
25
9
25
9
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