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| 型號(hào)： | LT1508IN |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類(lèi)： | 穩(wěn)壓器 |
| 英文描述： | Power Factor and PWM Controller(Voltage Mode) |
| 中文描述： | 1.5 A POWER FACTOR CONTROLLER WITH POST REGULATOR, 300 kHz SWITCHING FREQ-MAX, PDIP20 |
| 封裝： | 0.300 INCH, PLASTIC, DIP-20 |
| 文件頁(yè)數(shù)： | 9/16頁(yè) |
| 文件大?。?/td> | 337K |
| 代理商： | LT1508IN |
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9
LT1508
(P
IN
)(R
S
)(25)(R
IAC
+ 25k)
(V
IN2
)(R
REF
)
VA
OUT
= 2 +
See Figure 2 for R
REF
.
VA
OUT
is squared in the multiplier, resulting in excellent
performance over a wide range of output power and input
voltage without the addition of feedforward line frequency
ripple. Care must be taken to avoid feeding switching
frequency noise into the multiplier from the I
AC
pin. An
internal 25k is provided in series with the low impedance
multiplier input so that only a capacitor from the I
AC
pin to
GND1 is required to filter noise. The maximum multiplier
output current, which ultimately limits the input line cur-
rent, is set by a resistor from the R
SET
pin to GND1
according to the formula: I
M(MAX)
= 3.75V/R
SET
. Figure 5
shows I
M
versus I
AC
for various values of VA
OUT.
Note that
Figure 5 data was taken with R
SET
= 15k.
APPLICATIO
S I
N
FOR
ATIO
U
W
U
The multiplier output acts as the command signal to the
current loop error amplifier. During steady-state operation
the voltage across R
REF
= (I
M
)(R
REF
) = (I
IN
)(R
S
). Based on
this the value for R
S
is determined by:
(I
M(MAX)
)(R
REF
)(V
IN
)(eff)
P
OUT
2
R
S
≤
√
with R
SET
= 15k, I
M(MAX)
= 3.75/15k = 250
μ
A. For a 300W
converter with an efficiency (eff) of 0.8 at low line (90V
RMS
)
and R
REF
set to 4k, R
S
should be less than:
(250
μ
A)(4k)(90VAC)(0.8)
300W 2
= 0.169
A 0.15
resistor will yield a maximum peak input current
of (I
M(MAX)
)(R
REF
/R
S
) = (250
μ
A)(4k)/0.15
= 6.67A. For
a 100kHz switching frequency with R
SET
= 15k, C
SET
= 1.5/
(100kHz)(15k) = 1nF. For added protection the LT1508
provides a second independent current limit comparator.
When the input voltage to the comparator (PK
LIM
pin) dips
below 0V, GTDR1 pin quickly goes low turning off the PFC
power switch. A resistor divider from V
REF
to R
S
(Figure 6)
senses the voltage across the line current sense resistor
(R
S
) and limits the peak input line current to [(7.5V/R1) +
50
μ
A] (R2/R
S
). The 50
μ
A represents the PK
LIM
input
current which flows out of the PK
LIM
pin. With R1 = 10k
and R2 = 1.8k, I
IN
= 9.6A peak above the 6.67A peak
average plus the input inductor peak ripple current.
Always use R
SET
to set the primary line current limit. The
PK
LIM
comparator is only for secondary protection. When
the line current reaches the primary limit, V
OUT
can no
longer be supported with the given input current and
begins to fall. System stability is maintained by the current
loop which is controlled by the current amplifier. When the
Oscillator Frequency and Maximum
Line Current Setting
The oscillator frequency is set by R
SET
and C
SET
. R
SET
is
the resistor from the R
SET
pin to GND1 and C
SET
is the
capacitor from the C
SET
pin to GND1. R
SET
should be
determined first. The oscillator frequency, which is equal
to the switching frequency for both the PFC and PWM
section, is determined by:
1.5
(R
SET
)(C
SET
)
f
OSC
=
I
AC
(
μ
A)
0
I
M
μ
A
300
150
0
1508 F05
250
500
VA
OUT
= 7V
VA
OUT
= 6.5V
VA
OUT
= 6V
VA
OUT
= 5.5V
VA
OUT
= 5V
VA
OUT
= 4.5V
VA
OUT
= 4V
VA
OUT
= 3.5V
VA
OUT
= 3V
VA
OUT
= 2.5V
Figure 5. Multiplier Current I
M
vs I
AC
and VA
OUT
+
–
I
LINE
R
S
0.15
I
PKLIM
C1
1nF
7.5V
V
REF
PK
LIM
C1 IS TO REJECT NOISE, CURRENT
LIMIT DELAY IS ABOUT 2
μ
s
R2
1.8k
R1
10k
–
+
1508 F06
LT1508
Figure 6
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