APPLICATIONS INFOR
參數(shù)資料
型號(hào): LT1218LCS8#TR
廠商: Linear Technology
文件頁數(shù): 6/16頁
文件大?。?/td> 0K
描述: IC OPAMP PREC R-R I/O 5V 8SOIC
標(biāo)準(zhǔn)包裝: 2,500
放大器類型: 通用
電路數(shù): 1
輸出類型: 滿擺幅
轉(zhuǎn)換速率: 0.1 V/µs
增益帶寬積: 300kHz
電流 - 輸入偏壓: 30nA
電壓 - 輸入偏移: 35µV
電流 - 電源: 400µA
電流 - 輸出 / 通道: 12mA
電壓 - 電源,單路/雙路(±): 2 V ~ 10 V,±1 V ~ 5 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SO
包裝: 帶卷 (TR)
14
LT1218/LT1219
APPLICATIONS INFORMATION
WU
U
compensation. The output capacitance forms a filter,
which reduces pickup from the supply and lowers the
output impedance. This additional filtering is helpful in
mixed analog/digital systems with common supplies or
systems employing switching supplies. Filtering also
reduces high frequency noise, which may be beneficial
when driving A/D converters.
Figures 7a and 7b show the outputs of the LT1218/LT1219
perturbed by a 200mVP-P 50kHz square wave added to the
positive supply. The LT1219 power supply rejection is
about ten times greater than that of the LT1218 at 50kHz.
Note the 5-to-1 scale change in the output voltage traces.
The tolerance of the external compensation capacitor is
not critical. The plots of Overshoot vs Load Current in the
Typical Performance Characteristics section illustrate the
effect of a capacitive load.
LT1218/19 F07a
Figure 7a. LT1218 Power Supply Rejection Test
LT1218/19 F07b
Figure 7b. LT1219 Power Supply Rejection Test
TYPICAL APPLICATIONS
U
Buffer for 12-Bit A/D Converter
VREF
+ IN
– IN
GND
VCC
CLK
DOUT
CS/SHDN
1
2
3
4
8
7
6
5
LTC1285
+
TO
P
1
F
0.1
F
0.1
F
3V
VIN
LT1219
LT1218/19 TA03
High-Side Current Source
+
LT1218
1k
RSENSE
0.2
40k
Q1
MTP23P06
ILOAD
5V < VCC < 30V
0A < ILOAD < 1A AT VCC = 5V
0mA < ILOAD < 160mA AT VCC = 30V
Q2
2N4340
VCC
100
0.0033
F
LT1004-1.2
RP
10k
LT1218/19 TA04
V+
(AC)
VOUT
V+
(AC)
VOUT
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