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鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� LT1193CS8
寤犲晢锛� Linear Technology
鏂囦欢闋佹暩(sh霉)锛� 7/12闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC AMP VIDEO DIF ADJ 8-SOIC
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 100
鎳�(y墨ng)鐢細 宸垎
闆昏矾鏁�(sh霉)锛� 1
-3db甯跺锛� 80MHz
杞�(zhu菐n)鎻涢€熺巼锛� 500 V/µs
闆绘祦 - 闆绘簮锛� 35mA
闆绘祦 - 杓稿嚭 / 閫氶亾锛� 50mA
闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±)锛� 4.75 V ~ 16 V锛�±2.38 V ~ 8 V
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 8-SOIC锛�0.154"锛�3.90mm 瀵級
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 8-SOIC
鍖呰锛� 绠′欢
4
LT1193
1193fb
LT1193C
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VOS
Input Offset Voltage
N8 Package
q
214
mV
SO-8 Package
q
20
mV
VOS/T
Input VOS Drift
q
20
V/掳C
IOS
Input Offset Current
q
0.2
3.5
A
IB
Input Bias Current
q
卤0.5
卤4
A
Input Voltage Range
q
鈥�2.5
3.5
V
CMRR
Common Mode Rejection Ratio
VCM = 鈥� 2.5V to 3.5V
q
55
70
dB
PSRR
Power Supply Rejection Ratio
VS = 卤2.375V to 卤5V
q
55
70
dB
VOUT
Output Voltage Swing
RL = 1k
q
3.7
4
V
RL = 100
q
6.2
6.6
V
GE
Gain Error
VO = 卤 3V, RL = 1k
q
0.2
1.2
%
IS
Supply Current
q
35
43
mA
Shutdown Supply Current
Pin 5 at V 鈥� (Note 10)
q
1.3
2.1
mA
ISHDN
Shutdown Pin Current
Pin 5 at V 鈥�
q
20
A
Note 7: Full-power bandwidth is calculated from the slew rate
measurement:
FPBW = SR/2
蟺VP.
Note 8: Settling time measurement techniques are shown in 鈥淭ake the
Guesswork Out of Settling Time Measurements,鈥� EDN, September 19,
1985.
Note 9: NTSC (3.58MHz).
Note 10: See Applications section for shutdown at elevated temperatures.
Do not operate the shutdown above TJ > 125掳C.
Note 11: AC parameters are 100% tested on the ceramic and plastic DIP
packaged parts (J and N suffix) and are sample tested on every lot of the
SO packaged parts (S suffix).
Note 1: Absolute Maximum Ratings are those values beyond which the
life of a device may be impaired.
Note 2: A heat sink is required to keep the junction temperature below
absolute maximum when the output is shorted.
Note 3: When RL = 1k is specified, the load resistor is RFB1 + RFB2, but
when RL = 100 is specified, then an additional 100 is added to the
output.
Note 4: VOS measured at the output (Pin 6) is the contribution from both
input pair, and is input referred.
Note 5: VIN LIM is the maximum voltage between 鈥揤IN and +VIN (Pin 2 and
Pin 3) for which the output can respond.
Note 6: Slew rate is measured between
卤2V on the output, with a 卤1V
input step, AV = 3.
ELECTRICAL CHARACTERISTICS
The q denotes the specificatons which apply over the full operating temperature range of 0
掳C 鈮� TA 鈮� 70掳C. VS = 卤5V, VREF = 0V,
RFB1 = 900 from Pins 6 to 8, RFB2 = 100 from Pin 8 to ground, RL = RFB1 + RFB2 = 1k (Note 3), CL 鈮� 10pF, Pin 5 open circuit,
unless otherwise noted.
LT1193I
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VOS
Input Offset Voltage
SO-8 Package
q
220
mV
VOS/T Input VOS Drift
q
20
V/掳C
IOS
Input Offset Current
q
0.8
5
A
IB
Input Bias Current
q
卤1
卤5.5
A
Input Voltage Range
q
鈥�2.5
3.5
V
CMRR
Common Mode Rejection Ratio
VCM = 鈥� 2.5V to 3.5V
q
53
70
dB
PSRR
Power Supply Rejection Ratio
VS = 卤2.375V to 卤5V
q
53
70
dB
VOUT
Output Voltage Swing
RL = 1k
q
3.6
4
V
VS = 卤8V, RL = 100
q
6
6.5
GE
Gain Error
VO = 卤3V, RL = 1k
q
0.2
1.2
%
IS
Supply Current
q
35
43
mA
Shutdown Supply Current
Pin 5 at V 鈥� (Note 10)
q
1.3
2.2
mA
ISHDN
Shutdown Pin Current
Pin 5 at V 鈥�
q
20
A
The q denotes the specificatons which apply over the full operating temperature range of 鈥� 40
掳C 鈮� TA 鈮� 85掳C. VS = 卤5V,
VREF = 0V, RFB1 = 900 from Pins 6 to 8, RFB2 = 100 from Pin 8 to ground, RL = RFB2 = 1k (Note 3), CL 鈮� 10pF, Pin 5 open circuit,
unless otherwise noted.
鐩搁棞(gu膩n)PDF璩囨枡
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鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
LT1193CS8#PBF 鍔熻兘鎻忚堪:IC AMP VIDEO DIF ADJ 8-SOIC RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 绶氭€� - 鏀惧ぇ鍣� - 瑕栭牷鏀惧ぇ鍣ㄥ拰闋荤珐娌栧櫒 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 妯�(bi膩o)婧�(zh菙n)鍖呰:50 绯诲垪:- 鎳�(y墨ng)鐢�:TFT-LCD 闈㈡澘锛歏COM 椹�(q奴)鍕曞櫒 杓稿嚭椤炲瀷:婊挎摵骞� 闆昏矾鏁�(sh霉):1 -3db甯跺:35MHz 杞�(zhu菐n)鎻涢€熺巼:40 V/µs 闆绘祦 - 闆绘簮:3.7mA 闆绘祦 - 杓稿嚭 / 閫氶亾:1.3A 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):9 V ~ 20 V锛�±4.5 V ~ 10 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:8-TSSOP锛�8-MSOP锛�0.118"锛�3.00mm 瀵級瑁搁湶鐒婄洡 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:8-uMax-EP 鍖呰:绠′欢
LT1193CS8#TR 鍔熻兘鎻忚堪:IC AMP VIDEO DIFF ADJUST 8SOIC RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 绶氭€� - 鏀惧ぇ鍣� - 瑕栭牷鏀惧ぇ鍣ㄥ拰闋荤珐娌栧櫒 绯诲垪:- 妯�(bi膩o)婧�(zh菙n)鍖呰:1,000 绯诲垪:- 鎳�(y墨ng)鐢�:椹�(q奴)鍕曞櫒 杓稿嚭椤炲瀷:宸垎 闆昏矾鏁�(sh霉):3 -3db甯跺:350MHz 杞�(zhu菐n)鎻涢€熺巼:1000 V/µs 闆绘祦 - 闆绘簮:14.5mA 闆绘祦 - 杓稿嚭 / 閫氶亾:60mA 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):5 V ~ 12 V锛�±2.5 V ~ 6 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:20-VFQFN 瑁搁湶鐒婄洡 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:20-QFN 瑁搁湶鐒婄洡锛�4x4锛� 鍖呰:甯跺嵎 (TR)
LT1193CS8#TRPBF 鍔熻兘鎻忚堪:IC AMP VIDEO DIF ADJ 8-SOIC RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 绶氭€� - 鏀惧ぇ鍣� - 瑕栭牷鏀惧ぇ鍣ㄥ拰闋荤珐娌栧櫒 绯诲垪:- 妯�(bi膩o)婧�(zh菙n)鍖呰:1,000 绯诲垪:- 鎳�(y墨ng)鐢�:椹�(q奴)鍕曞櫒 杓稿嚭椤炲瀷:宸垎 闆昏矾鏁�(sh霉):3 -3db甯跺:350MHz 杞�(zhu菐n)鎻涢€熺巼:1000 V/µs 闆绘祦 - 闆绘簮:14.5mA 闆绘祦 - 杓稿嚭 / 閫氶亾:60mA 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):5 V ~ 12 V锛�±2.5 V ~ 6 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:20-VFQFN 瑁搁湶鐒婄洡 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:20-QFN 瑁搁湶鐒婄洡锛�4x4锛� 鍖呰:甯跺嵎 (TR)
LT1193IS8 鍔熻兘鎻忚堪:IC AMP VIDEO DIF ADJ GAIN 8-SOIC RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 绶氭€� - 鏀惧ぇ鍣� - 瑕栭牷鏀惧ぇ鍣ㄥ拰闋荤珐娌栧櫒 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 妯�(bi膩o)婧�(zh菙n)鍖呰:50 绯诲垪:- 鎳�(y墨ng)鐢�:TFT-LCD 闈㈡澘锛歏COM 椹�(q奴)鍕曞櫒 杓稿嚭椤炲瀷:婊挎摵骞� 闆昏矾鏁�(sh霉):1 -3db甯跺:35MHz 杞�(zhu菐n)鎻涢€熺巼:40 V/µs 闆绘祦 - 闆绘簮:3.7mA 闆绘祦 - 杓稿嚭 / 閫氶亾:1.3A 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):9 V ~ 20 V锛�±4.5 V ~ 10 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:8-TSSOP锛�8-MSOP锛�0.118"锛�3.00mm 瀵級瑁搁湶鐒婄洡 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:8-uMax-EP 鍖呰:绠′欢
LT1193IS8#PBF 鍔熻兘鎻忚堪:IC AMP VIDEO DIF ADJ GAIN 8-SOIC RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 绶氭€� - 鏀惧ぇ鍣� - 瑕栭牷鏀惧ぇ鍣ㄥ拰闋荤珐娌栧櫒 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 妯�(bi膩o)婧�(zh菙n)鍖呰:50 绯诲垪:- 鎳�(y墨ng)鐢�:TFT-LCD 闈㈡澘锛歏COM 椹�(q奴)鍕曞櫒 杓稿嚭椤炲瀷:婊挎摵骞� 闆昏矾鏁�(sh霉):1 -3db甯跺:35MHz 杞�(zhu菐n)鎻涢€熺巼:40 V/µs 闆绘祦 - 闆绘簮:3.7mA 闆绘祦 - 杓稿嚭 / 閫氶亾:1.3A 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):9 V ~ 20 V锛�±4.5 V ~ 10 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:8-TSSOP锛�8-MSOP锛�0.118"锛�3.00mm 瀵級瑁搁湶鐒婄洡 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:8-uMax-EP 鍖呰:绠′欢
鐧�(f膩)甯冪穵鎬ラ噰璩硷紝3鍒嗛悩宸﹀彸鎮ㄥ皣寰楀埌鍥炲京(f霉)銆�

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*鍨嬭櫉 *鏁�(sh霉)閲� 寤犲晢 鎵硅櫉 灏佽
娣诲姞鏇村閲囪臣

鎴戠殑鑱�(li谩n)绯绘柟寮�

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