參數(shù)資料
型號(hào)： LQA48B
廠商： National Semiconductor Corporation
英文描述： Cellular Phone Power Management Unit
中文描述： 蜂窩電話電源管理單元
文件頁(yè)數(shù)： 3/32頁(yè)
文件大?。?/td> 761K
代理商： LQA48B
Pin Description
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Name
N/C
AGND3
V
O8
IN5
V
O9
V
O10
IN6
V
O11
DGND
V
O3
IN2
V
O2
IN1
V
O1
PS-HOLD
BU_BAT
VRTC
IN (COMP1)
OUT (COMP1)
AGND1
IN (COMP2)
OUT (COMP2)
REF-BYP
V
O7
V
O6
-EN
IN4
V
O6
V
O5
IN3
V
O4
BSNS
ON
I/O
-
G
O
I
O
O
I
O
G
O
I
O
I
O
I
I
O
I
O
G
I
O
I
O
I
I
O
O
I
O
I
O
Type
-
G
A
P
A
A
P
A
G
A
P
A
P
A
D
A
A
A
A
G
A
A
A
A
D
P
A
A
P
A
A
OD
Description
Not used. Connect to ground.
Analog ground pin.
LDO 8 Output
Input power terminal to LDO’s. Must be connected to IN1–4 and IN6.
LDO 9 output.
LDO 10 output.
Input power terminal to LDO’s. Must be connected to IN1–5.
LDO 11 output.
Ground pin.
LDO 3 output.
Input power terminal to LDO’s. Must be connected to IN1 and IN3–6.
LDO 2 output.
Input power terminal to LDO’s. Must be connected to IN2–6.
LDO 1 output.
Active low off key initiated by the micro controller.
Back-up battery connection.
RTC_LDO output.
Non-inverting inout of the comparator 1.
Output of the comparator 1.
Analog ground pin.
Non-inverting input of the comparator 2.
Output of the comparator 2.
Reference bypass capacitor.
LDO 7 output.
LDO 6 on/off pin. Internal pull-down resistor of 1 M
.
Input power terminal to LDO’s. Must be connected to IN1–3 and IN5–6.
LDO 6 output.
LDO 5 output.
Input power terminal to LDO’s. Must be connected to IN1–2 and IN4–6.
LDO 4 output.
Main battery ID resistor connection.
Inverted open drain output signal of the ON input. Pulled low when ON is
pulled high and open drain when ON is pulled low. There is no significant
delay between the ON signal going high and ON pin going low. The delay
between ON signal going low and ON pin is determined by the pull up current
and capacitance connected to this pin.
Battery voltage sense pin. Should be connected as close to the battery’s +
terminal as possible.
Gate drive to the external MOSFET.
Battery supply input terminal. Must have 10 μF ceramic capacitor to GND.
LDO 5 on/off pin. Internal pull down resistor of 1 M
.
RTC_ALARM input.
Active high power On/Off key. This pin is pulled to GND by an internal 200
k
resistor.
Active high Hands Free connection signal. This pin has an internal 200 k
pull down resistor.
Charger input from a current limited power source. Must have a 1 μF ceramic
capacitor to GND.
Charge current sense resistor.
Reset output. Active low. (See Power Up Timing Diagram.)
33
BATT
SENSE
I
A
34
35
36
37
38
Drive
BATT
V
O5
-EN
RTC_ALARM
ON
O
O
I
I
I
A
A
D
D
D
39
HF_PWR
I
D
40
CHG_IN
I
P
41
42
I
SENSE
RESET
O
O
A
OD
L
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