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參數(shù)資料
| 型號： | LQ80221 |
| 英文描述： | LAN Transceiver |
| 中文描述： | 網(wǎng)絡(luò)收發(fā)器 |
| 文件頁數(shù)： | 24/91頁 |
| 文件大?。?/td> | 907K |
| 代理商： | LQ80221 |
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80220/80221
MD400159/E
24
3.13.7 AutoNegotiation Enable
The AutoNegotiation algorithm can be enabled (or re-
started) by setting the AutoNegotiation enable bit n the MI
serial port Control register. When the AutoNegotiation
algorithm is enabled, the device halts all transmissions
including link pulses for 1200-1500 mS, enters the Link
Fail State, and restarts the negotiation process. When the
AutoNegotiation algorithm s disabled, the selection of 100
Mbps or 10 Mbps modes s determined by he speed select
bit in the MI serial port Control register, and the selection
of Half or Full Duplex s determined by the duplex select bit
in the MI serial port Control register.
3.13.8 AutoNegotiation Reset
The AutoNegotiation algorithm can be nitiated at any time
by setting he AutoNegotiation reset bit n he MI serial port
Control register.
3.13.9 Link Indication
Receive link detect activity can be monitored through the
link detect bit n the MI serial port Status and Status Output
registers or it can also be programmed to appear on the
PLED3 or PLED0 pin by appropriately setting the pro-
grammable LED output select bits in the MI serial port
Configuration 2 register as shown n Table 5. When either
the PLED3 or PLED0 pins are programmed to be a link
detect output, these pins are asserted low whenever the
device s n he Link Pass State. The PLED3 output is open
drain with pullup resistor and can drive an LED from VCC;
The PLED0 output has both pullup and pulldown driver
transistors in addition to a weak pullup resistor, so it can
drive an LED from either VCC or GND. Both PLED3 and
PLED0 can also drive another digital input. Refer to the
LED Driver Section (3.23) for a description on how to
program the PLED[3:0] pins and their defaults.
3.13.10 Link Disable
The link integrity function can be disabled by setting the
link disable bit n the MI serial port Configuration 1 register.
When the link integrity function is disabled, the device is
forced into the Link Pass state, configures itself for Half/
Full Duplex based on the value of the duplex bit in the MI
serial port Control register, configures itself for 100/10
Mbps operation based on the values of the speed bit n the
MI serial port Control register, and continues to transmit
NLP's or TX idle patterns, depending on whether the
device is in 10 or 100 Mbps mode.
3.13.11 100Base-T4 Capability
The 80221 has he ability o advertise and detect 100Base-
T4 capability in addition to 100Base-TX Full/Half Duplex
and 10Base-T Full/Half Duplex capability. Refer to the
100Base-T4 Interface section for more details.
3.14 JABBER
3.14.1 100 Mbps
Jabber function is disabled in the 100 Mbps mode.
3.14.2 10 Mbps
Jabber condition occurs when the transmit packet ex-
ceeds a predetermined length. When jabber is detected,
the TP transmit outputs are forced to the idle state,
collision is asserted, and register bits in the MI serial port
Status and Status Output registers are set.
3.14.3 Jabber Disable
The jabber function can be disabled by setting the jabber
disable bit in the MI serial port Configuration 2 register.
3.15 RECEIVE POLARITY CORRECTION
3.15.1 100 Mbps
No polarity detection or correction is needed in 100 Mbps
mode.
3.15.2 10 Mbps
The polarity of the signal on the TP receive input is
continuously monitored. If either 3 consecutive ink pulses
or one SOI pulse indicates incorrect polarity on the TP
receive input, the polarity is internally determined to be
incorrect, and a reverse polarity bit is set in the MI serial
port Status Output register.
The 80220/80221 will automatically correct for the reverse
polarity condition provided that the autopolarity feature is
not disabled.
3.15.3 Autopolarity Disable
The autopolarity feature can be disabled by setting the
autopolarity disable bit in the MI serial port Configuration
2 register.
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