- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄358934 > LPC47M14G-NC (SMSC Corporation) Electrical Duct/Raceway Fitting; PDF資料下載
參數(shù)資料
| 型號(hào)： | LPC47M14G-NC |
| 廠商： | SMSC Corporation |
| 英文描述： | Electrical Duct/Raceway Fitting; |
| 中文描述： | 128引腳ENGANCED超級(jí)I / O與LPC接口和USB集線器控制器 |
| 文件頁(yè)數(shù)： | 21/205頁(yè) |
| 文件大?。?/td> | 1219K |
| 代理商： | LPC47M14G-NC |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)當(dāng)前第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)第172頁(yè)第173頁(yè)第174頁(yè)第175頁(yè)第176頁(yè)第177頁(yè)第178頁(yè)第179頁(yè)第180頁(yè)第181頁(yè)第182頁(yè)第183頁(yè)第184頁(yè)第185頁(yè)第186頁(yè)第187頁(yè)第188頁(yè)第189頁(yè)第190頁(yè)第191頁(yè)第192頁(yè)第193頁(yè)第194頁(yè)第195頁(yè)第196頁(yè)第197頁(yè)第198頁(yè)第199頁(yè)第200頁(yè)第201頁(yè)第202頁(yè)第203頁(yè)第204頁(yè)第205頁(yè)
SMSC DS – LPC47M14X
Page 21
Rev. 03/19/2001
6.3
The following sub-sections specify the implementation of the LPC bus.
6.3.1
LPC Interface Signal Definition
The signals required for the LPC bus interface are described in the table below. LPC bus signals use PCI 33MHz
electrical signal characteristics.
SIGNAL
NAME
LAD[3:0]
I/O
LPC address/data bus. Multiplexed command, address and data bus.
LFRAME#
Input
Frame signal. Indicates start of new cycle and termination of broken cycle
PCI_RESET#
Input
PCI Reset. Used as LPC Interface Reset.
LDRQ#
Output
Encoded DMA/Bus Master request for the LPC interface.
nIO_PME
OD
Power Mgt Event signal. Allows the LPC47M14x to request wakeup.
Powerdown Signal. Indicates that the LPC47M14x should prepare for power to be shut
on the LPC interface.
SER_IRQ
I/O
Serial IRQ.
PCI_CLK
Input
PCI Clock.
Note:
The CLKRUN# signal is not implemented in this part.
6.3.2
LPC Cycles
The following cycle types are supported by the LPC protocol.
CYCLE TYPE
I/O Write
I/O Read
DMA Write
DMA Read
The LPC47M14x
ignores cycles that it does not support.
6.3.3
Field Definitions
The data transfers are based on specific fields that are used in various combinations, depending on the cycle type.
These fields are driven onto the LAD[3:0] signal lines to communicate address, control and data information over the
LPC bus between the host and the LPC47M14x. See the “Low Pin Count (LPC) Interface Specification”,
Revision
1.0
, Section 4.2 for definition of these fields.
6.3.4
LFRAME# Usage
LFRAME# is used by the host to indicate the start of cycles and the termination of cycles due to an abort or time-out
condition. This signal is to be used by the LPC47M14x to know when to monitor the bus for a cycle.
This signal is used as a general notification that the LAD[3:0] lines contain information relative to the start or stop of a
cycle, and that the LPC47M14x monitors the bus to determine whether the cycle is intended for it. The use of
LFRAME# allows the LPC47M14x to enter a lower power state internally. There is no need for the LPC47M14x to
monitor the bus when it is inactive, so it can decouple its state machines from the bus, and internally gate its clocks.
When the LPC47M14x samples LFRAME# active, it immediately stops driving the LAD[3:0] signal lines on the next
clock and monitor the bus for new cycle information.
The LFRAME# signal functions as described in the Low Pin Count (LPC) Interface Specification, Revision 1.0.
LPC INTERFACE
TYPE
DESCRIPTION
LPCPD#
Input
TRANSFER SIZE
1 Byte
1 Byte
1 byte
1 byte
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LPC47M14J-NC | 4 PR 568B RJ45 STR UTP CASHD-ST54PVU-568B-BG-015 |
| LPC47M14N-NC | MULTI DVI TRANSMITTER -FIBER |
| LPC47M14O-NC | CAT5 AUDIO/VIDEO SPLITTER |
| LPC47M14U-NC | Connector assemblies, Mouse Computer cables; Connector Type A:male; Connector Type B:female; Cable Length:10ft |
| LPC47M14W-NC | SNAP LOCK CABLE MARKER - J (10PK) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LPC47M14H-NC | 制造商:SMSC 制造商全稱:SMSC 功能描述:128 PIN ENGANCED SUPER I/O CONTROLLER WITH AN LPC INTERFACE AND USB HUB |
| LPC47M14I-NC | 制造商:SMSC 制造商全稱:SMSC 功能描述:128 PIN ENGANCED SUPER I/O CONTROLLER WITH AN LPC INTERFACE AND USB HUB |
| LPC47M14J-NC | 制造商:SMSC 制造商全稱:SMSC 功能描述:128 PIN ENGANCED SUPER I/O CONTROLLER WITH AN LPC INTERFACE AND USB HUB |
| LPC47M14K-NC | 制造商:SMSC 制造商全稱:SMSC 功能描述:128 PIN ENGANCED SUPER I/O CONTROLLER WITH AN LPC INTERFACE AND USB HUB |
| LPC47M14L-NC | 制造商:SMSC 制造商全稱:SMSC 功能描述:128 PIN ENGANCED SUPER I/O CONTROLLER WITH AN LPC INTERFACE AND USB HUB |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。