參數(shù)資料
型號(hào): LPC2925FBD100
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: ARM9 microcontroller with CAN, LIN, and USB
中文描述: 32-BIT, FLASH, 125 MHz, RISC MICROCONTROLLER, PQFP100
封裝: 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT407-1, LQFP-100
文件頁(yè)數(shù): 7/84頁(yè)
文件大?。?/td> 551K
代理商: LPC2925FBD100
LPC2921_23_25_3
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 03 — 14 April 2010
7 of 84
NXP Semiconductors
LPC2921/2923/2925
ARM9 microcontroller with CAN, LIN, and USB
P1[10]/SDI1/SDA0
V
SS(CORE)
V
DD(CORE)
P1[9]/SDO1
V
SS(IO)
P1[8]/SCS1[0]/
TXDL1/CS0
P1[7]/SCS1[3]/RXD1
P1[6]/SCS1[2]/TXD1
P1[5]/SCS1[1]/
PMAT3[5]
P1[4]/SCS2[2]/
PMAT3[4]
TRST
RST
V
SS(OSC)
XOUT_OSC
XIN_OSC
40
[1]
41
42
43
[1]
44
45
[1]
GPIO1, pin 10
ground for digital core
1.8 V power supply for digital core
GPIO1, pin 9
ground for I/O
GPIO1, pin 8
SPI1 SDI
I
2
C0 SDA
-
SPI1 SDO
-
-
SPI1 SCS0
-
-
46
[1]
47
[1]
48
[1]
GPIO1, pin 7
GPIO1, pin 6
GPIO1, pin 5
SPI1 SCS3
SPI1 SCS2
SPI1 SCS1
UART1 RXD
UART1 TXD
PWM3 MAT5
-
-
-
49
[1]
GPIO1, pin 4
SPI2 SCS2
PWM3 MAT4
-
50
[1]
51
[1]
52
53
[3]
54
[3]
IEEE 1149.1 test reset NOT; active LOW; pulled up internally
asynchronous device reset; active LOW; pulled up internally
ground for oscillator
crystal out for oscillator
crystal in for oscillator
V
DD(OSC_PLL)
V
SS(PLL)
V
DD(IO)
P1[3]/SCS2[1]/
PMAT3[3]
P1[2]/SCS2[3]/
PMAT3[2]
P1[1]/EI1/PMAT3[1]
V
SS(CORE)
V
DD(CORE)
P1[0]/EI0/PMAT3[0]
P0[0]/PHB0/
TXDC0/D24
V
SS(IO)
P0[1]/PHA0/RXDC0
P0[2]/CLK_OUT/
PMAT0[0]
P0[3]/USB_UP_LED/
PMAT0[1]
P0[4]/PMAT0[2]
P0[5]/PMAT0[3]
V
DD(IO)
P0[6]/PMAT0[4]
P0[7]/PMAT0[5]
55
56
57
58
[1]
1.8 V supply for oscillator and PLL
ground for PLL
3.3 V power supply for I/O
GPIO1, pin 3
SPI2 SCS1
PWM3 MAT3
-
59
[1]
GPIO1, pin 2
SPI2 SCS3
PWM3 MAT2
-
60
[1]
61
62
63
[1]
64
[1]
GPIO1, pin 1
ground for digital core
1.8 V power supply for digital core
GPIO1, pin 0
GPIO0, pin 0
EXTINT1
PWM3 MAT1
-
EXTINT0
QEI0 PHB
PWM3 MAT0
CAN0 TXD
-
-
65
66
[1]
67
[1]
ground for I/O
GPIO0, pin 1
GPIO0, pin 2
QEI0 PHA
CLK_OUT
CAN0 RXD
PWM0 MAT0
-
-
68
[1]
GPIO0, pin 3
USB_UP_LED
PWM0 MAT1
-
69
[1]
70
[1]
71
72
[1]
73
[1]
GPIO0, pin 4
GPIO0, pin 5
3.3 V power supply for I/O
GPIO0, pin 6
GPIO0, pin 7
-
-
PWM0 MAT2
PWM0 MAT3
-
-
-
-
PWM0 MAT4
PWM0 MAT5
-
-
Table 3.
Pin name
LQFP100 pin assignment
…continued
Pin
Description
Function 0 (default)
Function 1
Function 2
Function 3
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