參數(shù)資料
型號(hào)： LPC2378
廠商： NXP Semiconductors N.V.
英文描述： Single-chip 16-bit/32-bit microcontrollers; 512 kB flash with ISP/IAP, Ethernet, USB 2.0, CAN, and 10-bit ADC/DAC
中文描述： 單芯片16-bit/32-bit微控制器，512的ISP /國(guó)際檢察官聯(lián)合會(huì)，以太網(wǎng)，USB 2.0，CAN和10 kB閃存位的ADC / DAC
文件頁(yè)數(shù)： 45/54頁(yè)
文件大小： 203K
代理商： LPC2378
LPC2378_1
NXP B.V. 2006. All rights reserved.
Preliminary data sheet
Rev. 01 — 6 December 2006
45 of 54
NXP Semiconductors
LPC2378
Fast communication chip
[1]
Except on initial access, in which case the address is set up T
cy(CCLK)
earlier.
T
cy(CCLK)
=
1
CCLK
.
Latest of address valid, CS LOW, OE LOW to data valid.
[2]
[3]
[4]
Address valid to data valid.
[5]
Earliest of CS HIGH, OE HIGH, address change to data invalid.
t
BLSHDNV
BLS HIGH to data invalid
time
XCLK HIGH to data valid
time
XCLK HIGH to WE LOW
time
XCLK HIGH to BLS LOW
time
XCLK HIGH to WE HIGH
time
XCLK HIGH to BLS HIGH
time
XCLK HIGH to data invalid
time
[2]
(2
×
T
cy(CCLK)
)
5
-
(2
×
T
cy(CCLK)
) + 5
ns
t
CHDV
-
-
10
ns
t
CHWEL
-
-
10
ns
t
CHBLSL
-
-
10
ns
t
CHWEH
-
-
10
ns
t
CHBLSH
-
-
10
ns
t
CHDNV
-
-
10
ns
Table 9.
C
L
= 25 pF T
amb
= 40
°
C.
Symbol
Parameter
External memory interface dynamic characteristics
…continued
Conditions
Min
Typ Max
Unit
Table 10.
Access cycle
Standard read access specifications
Max frequency
WST setting
WST
≥
0; round up to
integer
Memory access time requirement
standard read
standard write
burst read - initial
burst read - subsequent 3
×
N/A
f
MAX
RAM
--------------------------------
≤
WST1
t
cy CCLK
20 ns
+
)
--------------------------------
≥
2
–
t
RAM
t
cy CCLK
)
2
WST1
+
(
)
×
20 ns
–
≤
f
MAX
WRITE
---------------------------------
≤
WST2
t
-------------------------------------------
t
5
+
–
t
cy CCLK
)
≥
t
WRITE
t
cy CCLK
)
1
WST2
+
(
)
×
5 ns
–
≤
f
MAX
20 ns
+
t
INIT
-------------------------------
≤
WST1
t
t
cy CCLK
)
--------------------------------
≥
2
–
t
INIT
t
cy CCLK
)
2
WST1
+
(
)
×
20 ns
–
≤
f
MAX
ROM
--------------------------------
≤
t
ROM
t
cy CCLK
)
20 ns
–
≤
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