參數(shù)資料
型號: LPC2158FBD100
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: Single-chip 16-bit-32-bit microcontrollers; 512 kB flash, with 32 segment x 4 LCD driver
中文描述: 32-BIT, FLASH, 60 MHz, RISC MICROCONTROLLER, PQFP100
封裝: 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT407-1, LQFP-100
文件頁數(shù): 19/45頁
文件大?。?/td> 220K
代理商: LPC2158FBD100
LPC2157_2158_2
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 9 February 2009
19 of 45
NXP Semiconductors
LPC2157/2158
Single-chip 16-bit/32-bit microcontrollers
The LPC2158 is equipped with a USB device controller that enables 12 Mbit/s data
exchange with a USB host controller. It consists of a register interface, serial interface
engine, endpoint buffer memory and DMA controller. The serial interface engine decodes
the USB data stream and writes data to the appropriate end point buffer memory. The
status of a completed USB transfer or error condition is indicated via status registers. An
interrupt is also generated if enabled.
A DMA controller can transfer data between an endpoint buffer and the USB RAM.
6.10.1
Features
Fully compliant with USB 2.0 Full-speed specification.
Supports 32 physical (16 logical) endpoints.
Supports control, bulk, interrupt and isochronous endpoints.
Scalable realization of endpoints at run time.
Endpoint maximum packet size selection (up to USB maximum specification) by
software at run time.
RAM message buffer size based on endpoint realization and maximum packet size.
Supports SoftConnect and GoodLink LED indicator. These two functions are sharing
one pin.
Supports bus-powered capability with low suspend current.
Supports DMA transfer on all non-control endpoints.
One duplex DMA channel serves all endpoints.
Allows dynamic switching between CPU controlled and DMA modes.
Double buffer implementation for bulk and isochronous endpoints.
6.11 UARTs
The LPC2157/2158 each contain two UARTs. In addition to standard transmit and receive
data lines, the UART1 also provides a full modem control handshake interface.
Compared to previous LPC2000 microcontrollers, UARTs in LPC2157/2158 introduce a
fractional baud rate generator for both UARTs, enabling these microcontrollers to achieve
standard baud rates such as 115200 Bd with any crystal frequency above 2 MHz. In
addition, auto-CTS/RTS flow-control functions are fully implemented in hardware.
6.11.1
Features
16 B Receive and Transmit FIFOs.
Register locations conform to 16C550 industry standard.
Receiver FIFO trigger points at 1 B, 4 B, 8 B and 14 B
Built-in fractional baud rate generator covering wide range of baud rates without a
need for external crystals of particular values.
Transmission FIFO control enables implementation of software (XON/XOFF) flow
control on both UARTs.
LPC2158 UART1 equipped with standard modem interface signals. This module also
provides full support for hardware flow control (auto-CTS/RTS).
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