參數(shù)資料
型號(hào): LPC2158FBD100
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: Single-chip 16-bit-32-bit microcontrollers; 512 kB flash, with 32 segment x 4 LCD driver
中文描述: 32-BIT, FLASH, 60 MHz, RISC MICROCONTROLLER, PQFP100
封裝: 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT407-1, LQFP-100
文件頁(yè)數(shù): 18/45頁(yè)
文件大小: 220K
代理商: LPC2158FBD100
LPC2157_2158_2
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 9 February 2009
18 of 45
NXP Semiconductors
LPC2157/2158
Single-chip 16-bit/32-bit microcontrollers
Mask registers allow treating sets of port bits as a group, leaving other bits
unchanged.
All GPIO registers are byte addressable.
Entire port value can be written in one instruction.
6.7.1
Features
Bit-level set and clear registers allow a single instruction set or clear of any number of
bits in one port.
Direction control of individual bits.
Separate control of output set and clear.
All I/O default to inputs after reset.
6.8 10-bit ADC
The LPC2157/2158 contain two single 10-bit successive approximation ADCs. While
ADC0 has eight channels (six channels for LPC2158), ADC1 has eight channels.
Therefore, the total number of available ADC inputs for LPC2157 is 16 and for LPC2158 is
14.
6.8.1
Features
10-bit successive approximation ADC.
Measurement range of 0 V to VREF (2.0 V
VREF
V
DDA
).
Each converter capable of performing more than 400000 10-bit samples per second.
Every analog input has a dedicated result register to reduce interrupt overhead.
Burst conversion mode for single or multiple inputs.
Optional conversion on transition on input pin or timer match signal.
Global Start command for both converters.
6.9 10-bit DAC
The DAC enables the LPC2157/2158 to generate a variable analog output. The maximum
DAC output voltage is the VREF voltage.
6.9.1
Features
10-bit DAC.
Buffered output.
Power-down mode available.
Selectable speed versus power.
6.10 USB 2.0 device controller (LPC2158 only)
The USB is a 4-wire serial bus that supports communication between a host and a
number (127 max) of peripherals. The host controller allocates the USB bandwidth to
attached devices through a token based protocol. The bus supports hot plugging,
unplugging, and dynamic configuration of the devices. All transactions are initiated by the
host controller.
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